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Many Processor Systems-on-Chip (MPSoC) have become tremendously complex systems. They are more sensitive to variability with technology scaling, which complicates the system design and impact the overall performance. Energy consumption is... more
The bandpass filter is one of the essential blocks of every modern RF transceiver. Performance of the transceiver greatly depends on the performance of the bandpass filter. A bandpass filter designed with passive inductors suffers from... more
Multiple-channel die-stacked DRAMs have been used for maximizing the performance and minimizing the power of memory access in 2.5D/3D system chips. Stacked DRAM dies can be used as a cache for the processor die in 2.5D/3D system chips.... more
Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process... more
We present a cognitive neuroscience framework for comparing Spiking Neural Networks (SNNs) and Artificial Neural Networks (ANNs) using neuromorphic datasets. The study introduces Adaptive Temporal Information Compression (ATIC) framework... more
An enhanced low-power high-speed adder for error-tolerant application. Proceedings of the 12th International Symposium on Integrated Circuits, (pp.69-72) Singapore.
In modern VLSI technology, the occurrence of all kinds of errors has become inevitable. By adopting an emerging concept in VLSI design and test, error tolerance (ET), a novel error-tolerant adder (ETA) is proposed. The ETA is able to ease... more
Objectives/Goals This project seeks to use different antennas to increase the signal strength in a wireless Bluetooth connection between a speaker and a host device. Methods/Materials Jam Speaker and Thinkpad Laptop. Three antennas... more
Processing in Memory (PIM) is a computing paradigm that promises enormous gain in processing speed by eradicating latencies in the typical von Neumann architecture. It has gained popularity owing to its throughput by embedding storage and... more
Parity-preserving reversible circuits are gaining importance for the development of fault-tolerant systems in nanotechnology. On the other hand, Quantum-dot Cellular Automata (QCA), a potential alternative to CMOS, promises efficient... more
The front-end electronics (FEE) of the Compact Muon Solenoid (CMS) is needed very low power consumption and higher readout bandwidth to match the low power requirement of its Short Strip application-specific integrated circuits (ASIC)... more
During past few years Indoor navigation systems have been developed in many places such as Airports, Hospitals, Shopping malls, Companies and Museums. Museum 360 is a navigation system design specially for Museums. The system is developed... more
3D integration provides substantial benefits in boosting system performance and efficiency, especially in the End-of-Scaling era. The increasing demand for greater computational power, larger GPU cache sizes, energy efficiency, and... more
We analyze and demonstrate a synchronized CMOS photoreceiver for the conversion of optical inputs of pulse-light to electronic digital signals. Small-signal and photonic analysis of the proposed circuit are detailed. The photoreceiver was... more
Thus far, the L0 buffer organizations proposed and analyzed in the literature are, to a large extent, centralized, i.e., a single logical cluster is assumed and a single controller controls the indexing into the buffer to store and fetch... more
Thus far, the L0 buffer organizations proposed and analyzed in the literature are, to a large extent, centralized, i.e., a single logical cluster is assumed and a single controller controls the indexing into the buffer to store and fetch... more
Wi-Fi backscatter communication offers a compelling solution for ultra-low-power and battery-free communication systems, especially within the Internet of Things (IoT) domain. By repurposing existing Wi-Fi infrastructure and ambient... more
Wi-Fi backscatter communication offers a compelling solution for ultra-low-power and battery-free communication systems, especially within the Internet of Things (IoT) domain. By repurposing existing Wi-Fi infrastructure and ambient... more
Today's conventional search engines hardly do provide the essential content relevant to the user's search query. This is because the context and semantics of the request made by the user is not analyzed to the full extent. So here the... more
Today's conventional search engines hardly do provide the essential content relevant to the user's search query. This is because the context and semantics of the request made by the user is not analyzed to the full extent. So here the... more
This work presents a method to design parallel digital finite impulse response (FIR) filters for hardwired (fixed coefficients) implementation with reduced number of adders and logic depth in the multiplier block. The proposed method uses... more
GPUs continue to increase the number of streaming multiprocessors (SMs) to provide increasingly higher compute capabilities. To construct a scalable crossbar network-on-chip (NoC) that connects the SMs to the memory controllers, a cluster... more
GPUs continue to increase the number of streaming multiprocessors (SMs) to provide increasingly higher compute capabilities. To construct a scalable crossbar network-on-chip (NoC) that connects the SMs to the memory controllers, a cluster... more
The contribution of this paper is the first Hardware Transactional Memory (HTM) where the object structure is recognized and harnessed. Our approach is similar to hardware support of paged virtual memory using a virtually addressed cache... more
A new technique to enhance single-stage operational transconductance amplifiers (OTAs) is presented. Enhanced DC gain and reduced input parasitic capacitances are achieved by employing two input fully-differential voltage combiners, i.e.... more
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Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically refreshed to retain data. Like SRAM, eDRAM is susceptible to... more
Featured by high portability and programmability, Dynamic Voltage and Frequency Scaling (DVFS) has been widely employed to achieve energy efficiency for high performance applications on distributed-memory architectures nowadays through... more
Power density has become the limiting factor in technology scaling as power budget restricts the amount of hardware that can be active at the same time. Reducing supply voltage to ultra-low voltage ranges close to the threshold region has... more
To deal with the "memory wall" problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between them and fast L1 caches (inter-cache latency gap). Recently, Non-Uniform... more
Shifting computing architectures from von Neumann to event-based spiking neural networks (SNNs) uncovers new opportunities for low-power processing of sensory data in applications such as vision or sensorimotor control. Exploring roads... more
The hyperbolic and exponential functions are widely used in various applications in engineering fields such as machine learning, Internet of Things (IOT), signal processing, etc. To fulfill the needs of future applications effectively,... more
Reversible Logic is a very promising and flourishing research area. Reversible logic theoretically allows designers to build subsystem circuit design with zero power dissipation than the existing classical ones. However synthesis of... more
As one of the important technological boosters, strain in Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) was first introduced in the 90 nm node and it has been continuing since then. Incorporating strain in MOSFETs allow us... more
This paper presents a literature survey for technology mapping algorithm in field-programmable gate array architectures with single, dual and multiple supply voltages (Vdds) for power optimization , included both dynamic and leakage power... more
This study presents development and implementation of a power-efficient architecture of a 32-bit MAC Unit built with Verilog HDL for FPGA applications. This architecture also connects a Vedic multiplier to boost multiplication, along with... more
This report describes a new technique that combines the Hardware Scheduling and Component Selection phases for High Level Synthesis. Our technique simultaneously selects components from a given library while it schedules the operations... more
Author(s): Ramachandran, Loganath; Gajski, Daniel D. | Abstract: This report describes a new technique that combines the Hardware Scheduling and Component Selection phases for High Level Synthesis. Our technique simultaneously selects... more
The paper presents an area and speed efficient CMOS layout design of shift register on 180 nanometer (nm) technology. The proposed shift register is designed using Serial In Serial Out (SISO) and Serial In Parallel Out (SIPO) techniques.... more
This paper presents the design and analysis of a Practical Differentiator circuit implemented using CMOS technology, with a focus on enhancing stability and bandwidth performance. Practical differentiators play a crucial role in realtime... more
We propose topology design of power distribution nets using a novel method for capturing the temporal characteristics of sink currents -the current compatibility graph. This graph carries information necessary for net area optimization.... more
The demand for biomedical monitoring products is increasing worldwide. Low power is the most important concern/factor that need in circuits used for personal health monitoring application to achieve a long battery life. This Paper present... more
A Low Power Low Voltage CMOS Based Operational Transconductance Amplifier for Biomedical Application
In this paper, a low power low trans-conductance operational trans-conductance amplifier (OTA) is designed for biomedical application such as the EEG and ECG. To achieve a very low trans-conductance with low power the OTA should operate... more
In this paper proposed a novel design of a low power SRAM cell which is used for the high speed operations. The model uses the voltage mode method which is used reducing the voltage swing during the write operation switching activity. The... more
The use of intelligent controllers applied to indus-trial systems has been getting usual, not only in the process control as in the literature. The most utilized control methodology, within the artificial intelligent techniques, is based... more
Wireless video streaming has traditionally been considered an extremely power-hungry operation. Existing approaches optimize the camera and communication modules individually to minimize their power consumption. However, the joint... more
After comparing the properties of analog backscatter and digital backscatter, we propose that a combination of the two can provide a solution for high data rate battery free wireless sensing that is superior to either approach on its own.... more