Finite state machines

speci$cation, it is attractive to syrtthesize alternative impletnt?ntalions .followittg d(fferenl design paradigms such as synchronous, asynchronous or mixed-mode techniques. Present approaches to automatic top-down as well as to interactive bottom-up synthesis fail to support multiple paradigms, because they are based on internal (Jormal) models, which are not general enough. This paper introduces process calculi to serve as a basis for multi-paradigm synthesis from the same high-level spec(jication inte(face, notably timing diagrams. Due to their forntul manifestation, every synthesis step is verifiable. This leads to guaranteed correct implement atiorw.

We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematically elegant solutions to problems arising in the synthesis and optimization of synchronous digital hardware. Specifically, we derive a logical expression which yields a single finite state automaton characterizing the set of implementations that can replace a component of a larger design. The power of our approach is demonstrated by the fact that it generalizes immediately to arbitrary interconnection topologies, and to designs containing nondeterminism and fairness. We also describe control aspects of sequential synthesis and relate controller realizability to classical work on program synthesis and tree automata.

This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verification methods use BDDs, as a low level representation of a design. BDD operations require separation of data and control parts of a design and their implementation requires large CPU time and memory. In our method, a behavioral state machine is represented by a list of integer equations, and RT level properties are directly applied to this representation. This reduces the need for large BDD data structures and uses far less memory. Furthermore, this method is applied to circuits without having to separate their data and control sections. Integer equations are solved recursively by replacement and simplification operations. For this implementation, we use a canonical form of integer equations. This paper compares our results with those of the VIS verification tool that is a BDD based program.

Unbounded model checking of invariant properties is typically solved using symbolic reachability. However, BDD based reachability methods suffer from lack of robustness in performance, whereby it is difficult to estimate which one should be adopted for a given problem. We present a novel approach that examines a few short samples of the computation leading to an automatic, robust and modular way of reconciling the various methods for reachability. Our approach is able to intelligently integrate diverse reachability techniques such that each method can possibly get enhanced in efficiency. The method is in many cases orders of magnitude more efficient and it finishes all the invariant checking properties in VIS-Verilog benchmarks.

The use of exception handling mechanisms to develop robust software in a non-systematic manner can be a source of many design faults. This paper presents an approach that allows to systematize the validation of the system's exceptional behavior at both the software architecture and detailed design levels. At the software architecture, our solution is based on the specification and verification of architectural scenarios. At the detailed design level, the proposed solution consists on a static analysis tool that collects information regarding exceptional flows in a given behavioral model, to assist the task of validating the exceptional flow. This analysis anticipates the detection and therefore the correction of failures during the specification phase. The feasibility of our approach was evaluated by a case study of a mining control system.

Stateflow is a visual tool that is used extensively in industry for designing the reactive behaviour of embedded systems. Stateflow relies on techniques like simulation to aid the user in finding flaws in the model. However, simulation is inadequate as a means of detecting inconsistencies and incompleteness in the model. Tabular Expressions (function tables) have been used successfully in software development for more than thirty years. Tabular expressions are also visual representations of functions, but include the important properties of completeness and disjointness. In other words, a tabular expression is well-formed only when the input domain is covered completely (completeness), and when there is no ambiguity in the behaviour described by the tabular expression (disjointness). The goal of our work is to use the completeness and disjointness properties of well-formed tabular expressions to aid us in establishing those properties in Stateflow models. From the Stateflow models, we generate a new kind of tabular expression that includes extended output options. We use the informal Stateflow semantics from MathWorks documentation as the basis for generating our tabular expressions. The generated tabular expressions are then used to guarantee completeness and disjointness. We provide a transformation algorithm that we plan to implement in a tool to automatically generate tabular expressions from Stateflow models. •Software and its engineering → Consistency; Completeness; Formal software verification; Software notations and tools; Requirements analysis; Software design engineering;

The main purpose of the paper is to suggest a new form of BDD -SMTBDD diagram, methods of obtaining, and its basic features. The idea of using SMTBDD diagram in the process of logic synthesis dedicated to FPGA structures is presented. The creation of SMTBDD diagrams is the result of cutting BDD diagram which is the effect of multiple decomposition. The essence of a proposed decomposition method rests on the way of determining the number of necessary 'g' bounded functions on the basis of the content of a root table connected with an appropriate SMTBDD diagram. The idea of decomposition is presented in the form of a simple example. The paper also discusses the results of the experiments which confirm the efficiency of the analyzed decomposition methods.

Conformance testing in model-based development refers to the testing activity that verifies whether the code generated (manually or automatically) from the model is behaviorally equivalent to the model. Presently the adequacy of conformance testing is inferred by measuring structural coverage achieved over the model. We hypothesize that adequacy metrics for conformance testing should consider structural coverage over the requirements either in place of or in addition to structural coverage over the model. Measuring structural coverage over the requirements gives a notion of how well the conformance tests exercise the required behavior of the system. We conducted an experiment to investigate the hypothesis stating structural coverage over formal requirements is more effective than structural coverage over the model as an adequacy measure for conformance testing. We found that the hypothesis was rejected at 5% statistical significance on three of the four case examples in our experiment. Nevertheless, we found that the tests providing requirements coverage found several faults that remained undetected by tests providing model coverage. We thus formed a second hypothesis stating that complementing model coverage with requirements coverage will prove more effective as an adequacy measure than solely using model coverage for conformance testing. In our experiment, we found test suites providing both requirements coverage and model coverage to be more effective at finding faults than test suites providing model coverage alone, at 5% statistical significance. Based on our results, we believe existing adequacy measures for conformance testing that only consider model coverage can be strengthened by combining them with rigorous requirements coverage metrics.

In this paper, we present a mobile robot with an arm and a gripper, which can generate its own scenarios before executing them. Hand-written scenarios, as we previously did, are not applicable any longer, since a wider range of scenarios is aimed at, which cannot be predicted in advance. Our approach involves task planning, for scenario generation, and finite state automation, for scenario execution. Our robot is used for servicing handicapped or ageing persons in their apartment.

A new method is introduced for the synthesis for logical initializability of synchronous state machines. The goal is to synthesize a gate-level implementation that is initializable when simulated by a 3-valued 0,1,X simulator. The method builds on an existing approach of Cheng and Agrawal, which uses constrained state assignment to translate functional initializability i n to logical initializability. Here, a di erent state assignment method is proposed which, unlike the method of Cheng and Agrawal, is guaranteed safe and yet is not as conservative. Furthermore, it is demonstrated that certain new constraints on combinational logic synthesis are both necessary and su cient to insure that the resulting gate-level circuit is 3-valued simulatable. Interestingly, these constraints are similar to those used for hazard-free synthesis of asynchronous combinational circuits. Using the above constraints, we present a complete synthesis for initializability method, targeted to both two-level and multi-level circuits.

Base Object Model (BOM) is a component-based standard designed to support reusability and Composability. Reusability helps in reducing time and cost of the development of a simulation process. Composing predefined components such as BOMs is a well known approach to achieve reusability. However, there is a need for a matching mechanism to identify whether a set of components are composable or not. Although BOM provides good model representation, it lacks capability to express semantic and behavioral matching. In this paper we propose an approach for matching behavior of BOM components by matching their statemachines. Our proposed process includes a static and a dynamic matching phase. In the static matching phase, we apply a set of rules to validate the structure of statemachines. In the dynamic matching phase, we execute the statemachines together at an abstract level on our proposed execution framework. We have developed this framework using the State Chart Extensible Markup Language (SCXML), which is a W3C compliant standard. If the execution terminates successfully (i.e. reaches specified final states) we conclude that there is a positive match and the behavior of these BOMs is composable. We describe the matching process and the implementation of our runtime environment in detail and present a case study as proof of concept.

A business process can be developed as a composition of Web services provided by different service providers. These service providers may have their own policies and constraints for service provisioning and collaboration. In this paper, we focus on secure composition of services, specifically from the perspective of service enactment. Service enactment requires finding an execution plan for the service composition that conforms to the requirements and constraints of the service requester and all service providers. However, due to privacy and security concerns, participants may selectively expose their Web service operations and process details. We propose an approach for service enactment that does not require the participants to reveal their internal operations and constraints and that can still result in an execution plan which satisfies the requirements and constraints of all participants. The proposed approach uses Finite State Machines (FSM) to model component Web service operations, their interdependencies, as well security and access control policy constraints. Model checking is used to generate an appropriate Web service execution plan in an incremental manner. Commutative encryption based techniques are used to preserve privacy and security.

Processing (NLP) techniques have been used in Information Retrieval, the results is not encouraging. Proper names are problematic for cross language information retrieval (CLIR), detecting and extracting proper noun in Arabic language is a primary key for improving the effectiveness of the system. The value of information in the text usually is determined by proper nouns of people, places, and organizations, to collect this information it should be detected first. The proper nouns in Arabic language do not start with capital letter as in many other languages such as English language so special treatment is required to find them in a text. Little research has been conducted in this area; most efforts have been based on a number of heuristic rules used to find proper nouns in the text. In this research we use a new technique to retrieve proper nouns from the Arabic text by using set of keywords and particular rules to represent the words that might form a proper noun and the relationships between them. To extract proper nouns from the retrieved document, we need some information about it and where it was found. First, we mark the phrases that might include proper nouns; second, we apply rules to find the proper noun and we use simple methods (stop wording and stemming) usually yield significant improvements. To test the system we have used 20 articles extracted from the Al-Raya newspaper published in Qatar and Alrai newspaper published in Jordan.

Atualmente os orgaos de trânsito utilizam os sistemas de monitoramento de trafego para reducao de acidentes de trânsito e como ferramenta fundamental para a coleta de dados estatisticos para auxiliar no planejamento e gerenciamento dos sistemas viarios. Nestes dados sao observadas informacoes como a quantidade de veiculos que trafegam em determinado ponto, a velocidade media e a identificacao da categoria dos veiculos. A identificacao da categoria dos veiculos que trafegam em uma via permite o controle de acesso a faixas de rolagem destinadas a uma classe de veiculos especifica. O objetivo desse trabalho e propor uma solucao para classificacao de veiculos atraves da analise de sinais coletados de sensores indutivos no momento em que o veiculo passa sobre os mesmos. O conjunto destes sinais para cada veiculo e denominado perfil magnetico. Foi utilizado um classificador baseado em Rede Neural Artificial (RNA) para identificar o tipo de veiculo de acordo com o padrao do perfil magnetic...

We address the problem of failure diagnosis in discrete event systems with decentralized information. We propose a coordinated decentralized architecture consisting of local sites communicating with a coordinator that is responsible for diagnosing the failures occurring in the system. We extend the notion of diagnosability, originally introduced in Sampath et al. (1995) for centralized systems, to the proposed coordinated decentralized architecture. We specify three protocols that realize the proposed architecture; each protocol is defined by the diagnostic information generated at the local sites, the communication rules used by the local sites, and the coordinator's decision rule. We analyze the diagnostic properties of each protocol. We also state and prove conditions for a language to be diagnosable under each protocol. These conditions are checkable off-line. The on-line diagnostic process is carried out using the diagnosers introduced in Sampath et al. (1995) or a slight variation of these diagnosers. The key features of the proposed protocols are: (i) they achieve, each under a set of assumptions, the same diagnostic performance as the centralized diagnoser; and (ii) they highlight the "performance vs. complexity" tradeoff that arises in coordinated decentralized architectures. The correctness of two of the protocols relies on some stringent global ordering assumptions on message reception at the coordinator's site, the relaxation of which is briefly discussed.

We present the salient features of a methodology for failure diagnosis of dynamic systems that can be modeled as discrete event systems. This methodology was introduced by Sampath et al. for centralized systems and subsequently extended by Debouk et al. for certain classes of decentralized systems. We discuss how to perform detection and identification of unobservable fault events using diagnosers, which are finite-state automata that are built from the discreteevent model of the system under consideration. Examples of diagnosers are given. Comparisons with other methodologies for diagnosing dynamic systems are given.

In discrete-event systems, diagnosis consists in determining in bounded time and with certainty whether a fault has occurred given a sequence of observations . In fact, if some events internal to the system are not observable from outside, then a given observation sequence can correspond to several executions, some of which are faulty and other non-faulty. The simplest formalism for this problem is finite automata, and algorithms were given to check if a given model is diagnosable. However some systems carry an intrinsic ambiguity and the observations are not sufficient for diagnosing faults. Active diagnosis was suggested to overcome this issue . It consists in controlling the system by activating some events, and disabling some others, so that all induced executions can be diagnosed: whether a fault has occurred in the controlled system can be determined by looking at observations. The only objective in the active diagnosis problem is to control the system to make sure that any fault is diagnosed. But the computed controller does not guarantee any other property on the controlled system; for instance, a controller that makes sure that a fault always occurs is a possible solution to active diagnosis since it guarantees diagnosability. Some partial solutions were given, e.g. in , where it is required that the controller guarantees non-faulty behaviors with positive probability. In this internship, we suggest improving the active diagnosis problem to address this issue. We will consider diagnosability as an additional and secondary objective to be taken into account in controller synthesis with a given primary objective. Roughly, the controller should try to satisfy its primary objective, such as trying to avoid faults, and give additional diagnosability guarantees if this is not possible. The proper formalization of this idea is one of the objectives of this internship. For instance, what does it mean for a controller to try to avoid a fault? There are several directions that can be followed. One can explore the possibility of computing controllers that make sure that no fault occurs for a maximal subset of states, while ensuring diagnosability for the rest of the states. One can also formulate the problem in a quantitative way and look for controllers that minimize the time to fault. A third possibility is to use game theoretic notions to compare control strategies: for instance, a controller that ensures a fault immediately is worse than a controller that avoids any fault for k steps, and then possibly allow a fault without forcing it. Several classical notions from game theory, such as rationality, dominance, and regret, can be applied here to capture reasonable controllers. The direction to be explored can be chosen according to the intern's interests.

The paper presents a method for minimization of finite state machines (FSMs) with unspecified values of output variables. The proposed method is based on merging of two states. In addition to reduction of the FSM states, the method also allows reducing the number of FSM transitions and FSM input variables. This method enables reducing the number of internal states of the initial FSM by 1.22 times on the average, and by 2.75 times on occasion. An average reduction of the number of FSM transitions makes up 1.32 times, and on occasion may amount to 2.27 times. The comparison of the method with the program STAMINA shows that the offered method allows decreasing the number of FSM transitions by 1.55 times on the average, and by 3.92 times on occasion.

W pracy opisano syntezę automatów skończonych na bazie programowalnych układów logicznych (PLD). Cechą szczególną metody jest zastosowanie wartości zmiennych wyjściowych w charakterze części kodu stanów wewnętrznych automatu. W celu rozwiązania zadania został zastosowany wspólny model automatów Mealy'ego i Moore'a, przy czym automat nie podlega żadnym przekształceniom związanym ze zwiększeniem liczby stanów wewnętrznych i liczby przejść. W pracy opisano też metodę syntezy wspólnego modelu automatów skończonych klas AC.

The development of efficient algorithms to correct faults in rule-based systems is very crucial in extending the verification and validation of rule sets and in the development of rule-based systems. While it is important to detect various kinds of faults in rule sets, it is also equally important to provide a user/expert with a set of heuristics that can aid in correcting these faults. In this paper, a set of correction algorithms/heuristics for inconsistency, contradiction, circularity, redundancy, and unreachability faults are presented.

Abstract: The development of efficient algorithms to correct faults in rule-based systems is very crucial in extending the verification and validation of rule sets and in the development of rule-based systems. While it is important to detect various kinds of faults in rule sets, it is ...

En esta comunicación se proponen criterios de selección de episodios, con objetivos hidrológicos, y se aplican al territorio de la Confederación Hidrográfica del Júcar, en base a los datos diarios de 15 años (1989)(1990)(1991)(1992)(1993)(1994)(1995)(1996)(1997)(1998)(1999)(2000)(2001)(2002)(2003), proporcionados por el Sistema Automático de Información Hidrológica. Se seleccionan 363 episodios y se caracterizan en base a indicadores de total, duración, intensidad e irregularidad, calculados en once unidades territoriales. El análisis de estos indicadores evidencia una dicotomía litoral-interior. El ámbito litoral (exceptuando Alicante) registra el mayor número de episodios, fundamentalmente en invierno, con un aporte más importante y mayor irregularidad. Por el contrario, en el ámbito de interior los episodios son de menor intensidad y mayor presencia en verano. El efecto orográfico es importante, no sólo por la altitud, sino por la orientación de las cadenas montañosas.

This paper describes an integral automation structure for a steam generation plant, based on hybrid systems. We will describe the principal elements to achieve the automation: the image of the system under control (set of operation conditions and its behavior), and the supervisor with its decision system implemented as a hierarchical structure. This development permits the implementation of the complete control strategy for the whole plant using the technology in place. The results shown were obtained from the simulation of a real process, and it is considered as a validation in order to implement the proposed scheme.

In supervisor synthesis achieving nonblockingness is a major computational challenge when a target system consists of a large number of local components. To overcome this difficulty we propose an approach to synthesize a coordinated distributed supervisor, where the plant is modeled by a collection of nondeterministic finite-state automata and the requirement is modeled by a collection of deterministic finite-state automata. The synthesis is based on a previously developed automaton abstraction technique. We provide a sufficient condition, which guarantees the maximum permissiveness of the synthesized coordinated distributed supervisor. In addition, we show that the problem of finding a coordinator with the minimum number of states is NP-hard.

Rigorous development processes aim to be effective in developing critical systems, especially if failures can have catastrophic consequences for humans and the environment. Such processes generally rely on formal methods, which can guarantee, thanks to their mathematical foundation, model preciseness, and properties assurance. However, they are rarely adopted in practice. In this paper, we report our experience in using the Abstract State Machine formal method and the ASMETA framework in developing a prototype of the control software of the MVM (Mechanical Ventilator Milano), a mechanical lung ventilator that has been designed, successfully certified, and deployed during the COVID-19 pandemic. Due to time constraints and lack of skills, no formal method was applied for the MVM project. However, we here want to assess the feasibility of developing (part of) the ventilator by using a formal method-based approach. Our development process starts from a high-level formal specification of the system to describe the MVM main operation modes. Then, through a sequence of refined models, all the other requirements are captured, up to a level in which a C++ implementation of a prototype of the MVM controller is automatically generated from the model, and tested. Along the process, at each refinement level, different model validation and verification activities are performed, and each refined model is proved to be a correct refinement of the previous level. By means of the MVM case study, we evaluate the effectiveness and usability of our formal approach.

In large-scale model-based development, developers periodically need to combine collections of interrelated models. These models may capture different features of a system, describe alternative perspectives on a single feature, or express ways in which different features may alter one another's structure or behaviour. We refer to the process of combining a set of interrelated models as model fusion. In this position paper, we provide an overview of our work on two key fusion activities, merging and composition, for behavioural models. The practical basis of our work comes from two case studies that we conducted using models from the telecommunications domain. We illustrate our work using these case studies, summarize the results our research has led to so far, and describe the future research challenges.

Increased traffic volumes resulting from urbanization, industrialization, and population growth have given rise to complex issues, including congestion, accidents, and traffic violations at intersections. In the absence of a functional smart traffic light system, traffic congestion occurs due to imbalanced traffic flow at intersections. Current traffic management lacks provisions for ensuring the unobstructed movement of emergency vehicles, even a small delay for which can have significant consequences. This paper presents a smart traffic light controller developed using Verilog hardware description language (HDL) in Quartus Prime 21.1 and Questa Intel field programmable gate array (FPGA) Starter Edition 2021.2, and implemented on an Altera DE2-115 FPGA. The controller is designed specifically to detect emergency vehicle at four-way intersections for inputs radio frequency identification (RFID) readers and infrared (IR) sensors. The RFID readers and IR sensors are managed through slide switches on the FPGA board. The smart traffic light controller contains three sub-modules: clock division, counter, and finite state machine (FSM) operation, enabling it to manage traffic in scenarios with emergency vehicles, high traffic density, and low traffic density. This proposed system can alleviate intersection congestion by controlling access and allocating time effectively. In conclusion, the project ensures the smooth passage of emergency vehicles by continuously monitoring their presence and giving them priority in traffic flow.

Cache memories employ two main policies namely write-through and write back. The write-through policy is much more energy efficient than write-back. However write-through policy also incurs large energy overhead. Considering the energy efficiency comparison of the various way-tagged cache architectures is made here which employs D-FF, ETL, GDI technique as well as D-latch as the datum storage elements.

In the Agent-oriented software engineering (AOSE) community, it is now widely recognised that interaction is perhaps the most important single characteristic of complex software systems. Recently, the focus of AOSE research has shifted towards social (or organisational) modelling, which allows interaction to be modelled with higher-level constructs like organisational structures and social policies. However, a gap remains between the social models proposed in AOSE methodologies and the increasing number of sophisticated agent interaction frameworks outside AOSE, such as those based on auctions, commitments, and dialogue games. Hence, social models in AOSE methodologies need to have more "hooks'' to enable integration with rich domain-specific agent interaction frameworks. Towards closer integration between social modelling in AOSE and other agent interaction frameworks, we extend the ROADMAP methodology and provide a framework for enhancing the analysis of interaction requirements through goal-oriented analysis and social modelling. More precisely, goal models provide the purpose of interaction, while social models provide the social dependencies and policies that govern interaction. We show how the resulting requirements specification, complemented by protocol descriptions, can inform the design of the system's interaction model. The resulting approach bridges the gap described above by linking high-level social concepts to low-level, domain-specific design decisions about interaction.

Objects have been described as having identity, state and behaviour, but there are di ering views as to what are an object's states. For a programmer using an object-oriented programming language, the state is the current v alues of all the attributes, hidden and accessible. In most object-oriented design methods, an object's state is an abstraction of this: design states are determined by the observable behaviour of the object. The di erence is signi cant, for example the two views behave di erently under inheritance, and this can make it di cult to validate an implementation against its design speci cation. We describe a technique for resolving these di erent views of state. The representation states of an object can be partitioned into abstract states by predicates on the attributes. We relate this to an operational semantics for the object-oriented programming language Sather. A direct implication is that the behaviour of objects can be described by nite state machines. Since there are testing techniques based on proving the equivalence of two state machines for example, a design speci cation and its implementation, it is now feasible to prove test coverage of automatically generated tests for object oriented programs to the level of abstract states.

Algorithmic State Machines are a 40-year old tool for the design of digital circuits. They are a good alternative to Finite State Machines, where only states can be properly described, but actions must be annotated as lateral comments. However, current notation for these diagrams has several limitations for medium-large designs, and often lateral annotations are finally needed. This paper presents an alternative notation for ASM diagrams, trying to overcome these limitations. This new notation is more consistent and thus more convenient for CAD tools.

In testing Discrete Event System, an important topic is determining the final state of the machine after the application of a test. Synchronizing and homing sequences have been proposed in the sixties to solve the problem using Mealy machines. A synchronizing sequence drives an implementation of a given model, seen as a black box, to a known state regardless of its initial state and the outputs. In this paper, we investigate how to determine synchronizing sequences using systems represented by a class of synchronized Petri nets. We propose an approach that can be applied to (not necessarily strongly) connected nets. Regardless of the number of tokens that the net contains, a synchronizing sequence may be computed in terms of the net structure, thus avoiding the state explosion problem.

In testing Discrete Event System, an important topic is determining the final state of the machine after the application of a test. Synchronizing and homing sequences have been proposed in the sixties to solve the problem using Mealy machines. A synchronizing sequence drives an implementation of a given model, seen as a black box, to a known state regardless of its initial state and the outputs. In this paper, we investigate how to determine synchronizing sequences using systems represented by a class of synchronized Petri nets. We propose an approach that can be applied to (not necessarily strongly) connected nets. Regardless of the number of tokens that the net contains, a synchronizing sequence may be computed in terms of the net structure, thus avoiding the state explosion problem.

Synchronizing sequences have been proposed in the late 60's to solve testing problems on systems modeled by finite state machines. Such sequences lead a system, seen as a black box, from an unknown current state to a known final one. This paper presents a first investigation of the computation of synchronizing sequences for systems modeled by bounded synchronized Petri nets. In the first part of the paper, existing techniques for automata are adapted to this new setting. Later on, new approaches, that exploit the net structure to efficiently compute synchronizing sequences without an exhaustive enumeration of the state space, are presented.

Abstract. A new algorithm is presented for computing approximations of the reached sets of linear hybrid automata. First, we present some new theoretical results on termination of a class of reachability algorithms, which includes Botchkarev's, based on ellipsoidal calculus. The main contribution of the paper is a revised reachability computation that avoids the approximations caused by the union operation in the discretized flow tube estimation. Therefore, the new algorithm may correctly classify as unreachable states that are ...

Consider the problem of designing a component that combined with a known part of a system, called the context, conforms to a given overall specification. This question arises in several applications ranging from logic synthesis to the design of discrete controllers. We cast the problem as solving abstract equations over languages and study the most general solutions under the synchronous and parallel composition operators. We also specialize such language equations to languages associated with important classes of automata used for modeling ...

A new approach is presented for computing approximations of the reached sets of linear hybrid automata. First, we present some new theoretical results on termination of a class of reachability algorithms, which includes Botchkarev's, based on ellipsoidal calculus. The main contribution of the paper is a revised reachability computation that avoids the approximations caused by the union operation in the discretized flow tube estimation. Therefore, the new algorithm may classify as unreachable states that are reachable according to the previous algorithm because of the looser over-approximations introduced by the union operation. We implemented the new reachability algorithm and tested it successfully on a real-life case modeling a hybrid model of a controlled car engine.

Software architectures for agent technology and robots have been polarized between reactive architectures and architectures based on planning and reasoning. Although hybrid architectures have been shown to offer benefits from both, these seem complicated to integrate. In this paper we integrate the reactive nature of finite state machines and the reasoning capabilities of non-monotonic logics to produce intelligent autonomous robots. In particular, we demonstrate this with a robotic poker player. The robotic player integrates vision, sound recognition, motion control and the reasoning to perform competitively as a player in a complex game with incomplete information.

This paper considers the optimization of a class of joint source-channel codes described by finite-state encoders (FSEs) generating variable-length codes. It focuses on FSEs associated to joint source-channel integer arithmetic codes, which are uniquely decodable codes by design. An efficient method for computing the free distance of such codes using Dijkstra's algorithm is proposed. To facilitate the search for codes with good distance properties, FSEs are organized within a tree structure, which allows the use of efficient branch-and-prune techniques avoiding a search of the whole tree.

This paper presents an ontology-based Virtual Factory tool to support the 3D design of factories. The official ifcOWL is the reference ontology that was adopted to develop the I/O software connector of the tool. The key advantage of the ontology interface is represented by the easy integration with other software tools that can either use the layout generated by GIOVE-VF or provide information about the evolution of the objects that can be visualized in realistic animations.

The growing importance of manufacturing SMEs within the European economy, in terms of Gross Domestic Product and number of jobs, emphasizes the need of proper ICT tools to support their competitiveness. Major ICT players already offer one-does-all Product Lifecycle Management suites, supporting several phases of the product-process-plant definition and management. However, these do also show consistent shortcomings in terms of SME accessibility, degree of personalization and they often lack of an acceptable level of interoperability. These problems are being addressed by the development of a Virtual Factory Framework (VFF), within an EU funded project. The approach is based on four pillars: 1) Semantic Shared Data Model, 2) Virtual Factory Manager (VFM), 3) Decoupled Software Tools that lay on the shared data model and can interact through the VFM, 4) Integration of Knowledge. This paper will focus on the Virtual Factory Manager, proposing an evolution of the former VFF second Pillar , that acts as a server supporting the I/O communications within the framework and its stored knowledge for the decoupled software tools needing to access its repository.