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Circuit Optimization

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Circuit optimization is the process of improving the performance, efficiency, and resource utilization of electronic circuits. It involves techniques to minimize power consumption, reduce area, enhance speed, and improve reliability, often through algorithmic approaches and design methodologies in both analog and digital circuit design.
lightbulbAbout this topic
Circuit optimization is the process of improving the performance, efficiency, and resource utilization of electronic circuits. It involves techniques to minimize power consumption, reduce area, enhance speed, and improve reliability, often through algorithmic approaches and design methodologies in both analog and digital circuit design.
The circularly polarized MIMO(multiple input multiple output ) antenna is used to improve the bandwidth.The antenna is based on coplanar waveguide (CPW)-fed monopole extension of an microstrip line. The orthogonal field components... more
Artificial neural networks have emerged as a powerful technique for RF/microwave modeling and design. Artificial neural network parameters as number of neurons, sampling data, which are necessary for training can be utilized through... more
We exploit the "regularity" of Boolean functions with the purpose of decreasing the time for constructing minimal threelevel expressions, in the sum of pseudoproducts (SPP) form recently developed. The regularity of a Boolean function of... more
This correspondence presents pseudocoevolutionary genetic algorithms (GAs) for power electronic circuit (PEC) optimization. Circuit parameters are optimized through two parallel coadapted GA-based optimization processes for the power... more
In this paper the design of a filtering structure with improved group-delay characteristic in microstrip technology is presented. This improvement is achieved by using pairs of equalization poles. In addition, an improved selectivity with... more
In this paper, a simulation-based synthesis tool, AMIGO, for analog cell sizing is presented. AMIGO is based upon genetic optimization techniques adapted to circuit sizing. A framework has been developed using TCL/TK language that allows... more
Optimization of a circuit by transistor sizing is often a slow, tedious and iterative manual process which relies on designer intuition. Circuit simulation is carried out in the inner loop of this tuning procedure. Automating the... more
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is particularly susceptible to charge-sharing and coupling noise.... more
Automating the transistor and wire-sizing process is an important step toward being able to rapidly design highperformance, custom circuits. This paper presents a circuit optimization tool that automates the tuning task by means of... more
This paper shows how the use of exhaustive fault injection campaigns in conjunction with the analysis of the property of a circuit, allows to improve the efficiency of the checker of self checking circuits. Experimental results coming... more
We present an open-source tool for manipulating Boolean circuits. It implements efficient algorithms, both existing and novel, for a rich variety of frequently used circuit tasks such as satisfiability, synthesis, and minimization. We... more
The study presents a method for the development of DSP algorithm prototypes for wireless communication systems that involves the utilization of field-programmable gate arrays (FPGAs). Functional FPGAs offer a versatile and potent platform... more
This paper introduces an innovative circuit driver engineered to significantly enhance the efficiency and longevity of high-power microwave amplifiers, addressing critical limitations of traditional drivers in handling high-power systems.... more
We present a new method for removing user-specified false subgraphs from timing analysis and circuit optimization. Given a timing graph and a list of specified false paths, false subpaths, or false subgraphs, we generate a new timing... more
In this paper, a multiple-input-multiple-output (MIMO) antenna featuring circular polarization diversity, and designed on a common coplanar ground is presented. The proposed antenna design utilizes a coplanar waveguide (CPW) feeding... more
The filtering process is widely used in several digital signal processing and digital image processing applications. The filter process is to remove the noise in original signal or image. THE LEAST MEAN SQUARE (LMS) adaptive filter is the... more
We exploit the "regularity" of Boolean functions with the purpose of decreasing the time for constructing minimal threelevel expressions, in the sum of pseudoproducts (SPP) form recently developed. The regularity of a Boolean function of... more
The reversible circuit synthesis problem can be reduced to permutation group. This allows Schreier-Sims Algorithm for the strong generating set-finding problem to be used to find tight bounds on the synthesis of 3-bit reversible circuits... more
Many universal reversible libraries that contain more than one gate type have been proposed in the literature. Practical implementation of reversible circuits is much easier if a single gate type is used in the circuit construction. This... more
Non-Trivial Reversible Identities (NTRIs) are reversible circuits that have equal inputs and outputs. NTRIs of arbitrary size cannot be detected, in general, using optimization algorithms in the literature. Existence of NTRIs in a circuit... more
Latches are extensively used in high-performance sequential circuit designs to achieve high frequencies because of their good performance and time-borrowing feature. However, the amount of timing uncertainty due to crosstalk accumulated... more
Analog macrocell placement is an NP-hard problem. This paper presents an attempt to solve this problem by using the optimization flow of a genetic algorithm (GA) enhanced by simulated annealing (SA). The bit-matrix representation is... more
A robust new algorithm for electromagnetic (EM) optimization of microwave circuits is presented. The algorithm (TRASM) integrates a trust region methodology with the aggressive space mapping (ASM). The trust region ensures that each... more
Separate optimizations of logic and layout have been thoroughly studied in the past and are well documented for common bench- marks. However, to be competitive, modern circuit optimizations must use physical and logic information... more
Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the quality of the final design, often because they neglect important physical aspects of... more
Test and measurement equipment often targets high bit-rate PAM4 signals that carry data at rates of several gigabits per second. These PAM4 signals are used to measure the quality of interconnects such as RF cables used in datacenters and... more
Mostproblems in logic synthesis are computationally hard, and are solved using heuristics. This often makes algorithms unstable ; if the input is changed slightly, the new result of synthesis can be significantly different. A designer can... more
This paper presents a forthcoming compact high-performance two-element multiple-inputmultiple-output (MIMO) diverse antenna for wireless-LAN 5 GHz band and sub-6 GHz 5G (NR) band. The proposed antenna consists of two symmetrical antenna... more
Wirelength estimation for a given placement (cont'd.) Rectilinear minimum spanning tree (RMST)
Acta Cryst. (2006). E62, m3491-m3493 Srinivasan et al. (C 6 H 16 N 2)[WS 4 ] m3493 electronic reprint
In this paper, we study exact multi-level logic benchmarks. We refer to an exact logic benchmark, or exact benchmark in short, as the optimal implementation of a given Boolean function, in terms of minimum number of logic levels and/or... more
Given a set of logic primitives and a Boolean function, exact synthesis finds the optimum representation (e.g., depth or size) of the function in terms of the primitives. Due to its high computational complexity, the use of exact... more
Korea Astronomy and Space Science Institute has been developing one mobile and one stationary satellite laser ranging system for the space geodesy research and precise orbit determination since 2008, which are called as ARGO-M and ARGO-F,... more
A novel technique to derive the lossy equivalent circuit of waveguide external couplings of narrowband cavity filters with arbitrary cavity cross section and arbitrary coupling geometry is presented in this contribution. The technique... more
Given the increasing impact of aircraft noise for certification and commercialization purposes, a great effort has been made to decrease the acoustic emissions of newer aircraft. A great number of airports around the world limit noise... more
In this paper a new full adder (FA) circuit optimized for ultra low power operation is proposed. The circuit is based on modified XOR gates operated in the subthreshold region to minimize the power consumption. Simulated results using... more
In this article, a small broadband dual-polarized antenna is presented. The main structure consists of the four irregular polygon patches printed on the bottom layer of the substrate, two trapezoidal coupling plates printed on the top... more
In this paper, we propose two eficient systolic architectures for I-D and 2-0 Delay Least-Mean-Square (DLMS) adaptive digital filters. Using our developed architectures, higher convergence rate and Signal-to-Noise Ratio (SNR) than those... more
The wireless communication system is steered towards the millimeter wave spectrum to achieve low latency and high-speed data rate. The MIMO antennas aid in attaining a higher data rate. The prominent spectrum at millimeter wave is... more
Scalable approach for external collector resistance calculation. C. Raya(') '2), N. Kauffmann('), F. Pourchon('), D. Celi(l), T. Zimmer 2).
Circuits optimized for minimum energy consumption operate typically in the subthreshold regime with ultra-low power-supply voltages. Speed of a subthreshold logic circuit is enhanced with an increase in the die temperature. The excessive... more
An eightfold improvement in power efficiency can be achieved without loss of performance for modestly parallelizable CMOS-based computer systems.
An eightfold improvement in power efficiency can be achieved without loss of performance for modestly parallelizable CMOS-based computer systems.
Redundancy-addition-and-removal is a rewiring technique which for a given target wire w t finds a redundant alternative wire w a. Addition of w a makes w t redundant and hence removable without changing the overall circuit functionality.... more
In this paper, a multiple-input-multiple-output (MIMO) antenna featuring circular polarization diversity, and designed on a common coplanar ground is presented. The proposed antenna design utilizes a coplanar waveguide (CPW) feeding... more
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