Measurement of small capacitance variations

IEEE Transactions on Instrumentation and Measurement, 2000

A new capacitance sensor system was developed with a microcontroller, commercial humidity and temperature sensors, a capacitance-to-digital converter, and a custom-built capacitance sensor. The performance of the system was evaluated by simulation and testing of the prototype. The impact of variations of ambient conditions on the system performance was analyzed, and a model for correcting the humidity and temperature influence was developed. Based on the experimental results obtained in an uncontrolled environment using a standard capacitor of 1 pF, the 24-h stability of the system was estimated to be within 30 parts in 10 6 . The high stability and sensitivity of the system allow its effective use in object-detection applications. Several sensors were constructed and evaluated while sensing various materials under different scenarios.

Circuits Systems and Signal Processing, 2017

An accurate CMOS interface small capacitance variation sensing circuit for capacitive MEMS sensor applications An accurate front-end CMOS interface circuit for sensing very small capacitance changes in capacitive sensors is presented in this paper. The proposed structure scales capacitance variation to the sensible impedance changing. The scaling factor of the circuit can be easily tuned by adjusting bias points of the transistors. In order to cancel or decrease the parasitic components, the RC feedback and input transistor cascading techniques are used in the design. To simulate the circuit, HSPICE simulator is utilized to verify the validity of the theoretical formulations in 0.18 µm technology. According to schematic and post layout simulation results input impedance changes linearly versus capacitance variations up to 0.7 GHz while the sensor capacitance changing is varied between 0~200fF. Total dc power consumption is obtained as low as 1.2 mW with 1.8 V power supply.

Journal of Electronic Testing, 2016

In this paper, a new capacitance-to-frequency converter using a charge-based capacitance measurement (CBCM) circuit is proposed for on-chip capacitance measurement and calibration. As compared to conventional capacitor measurement circuits, the proposed technique is able to represent the capacitance in term of the frequency so that the variations can be easily handled in measurement or calibration circuits. Due to its simplicity, the proposed technique is able to achieve high accuracy and flexibility with small silicon area. Designed using standard 180 nm CMOS technology, the core circuit occupies less than 50 μm × 50 μm while consuming less than 60 μW at an input frequency of 10 MHz. Post-layout simulation shows that the circuit exhibits less than 3 % measurement errors for fF to pF capacitances while the functionality has been significantly improved.

KnE Social Sciences, 2019

This article reports the technique of measuring capacitance using the concept of charging capacitors in the RC-series circuit. The proposed capacitance measuring system is built using 3 subsystems: (1) Arduino M0 board (with 12-bit internal ADC) to control the process of discharging and charging capacitor voltages using the digitalWrite() function; (2) ERM20004FB-2 LCD with 2-serial module to display measurement data; and (3) CHARGE-series circuit (CHARGE is a carbon-film 89. 7Mohm resistor and is the capacitor to be measured). The charging time ofthe capacitor voltage from 0 to 0.5 (Δ) is calculated using the analogRead() and micros() functions. The value is calculated using the equation = Δ (693.1471×) and with the value Δ displayed on the LCD module. The capacitance measuring system has been tested to measure capacitance of 14 ceramic-disk capacitors from 1 to 100 with an error rate< ±0.7% (compared to LCR-821. The results of the study concluded that the error rate was influenced by changes in the resistance value of CHARGE .

IEEE Transactions on Instrumentation and Measurement, 1988

This paper discusses the errors introduced in an operational amplifier-based sine-wave oscillator applied in capacitance measurement. The errors due to the nonideal characteristics of the operational amplifier are addressed. The oscillator circuit was simulated using the SPICE program, and gives us the opportunity to study the behavior of the circuit under nonideal conditions, and also to estimate the errors introduced in the measured capacitance and the frequency of oscillation. It is shown that major sources of error are the gainbandwidth product and the output resistance of the operational amplifier. Compensation techniques to reduce errors related to the gainbandwidth product are presented. Experimental results confirming the error reduction are also included.

International Journal of Electronics Letters, 2016

An accurate CMOS interface small capacitance variation sensing circuit for capacitive MEMS sensor applications An accurate front-end CMOS interface circuit for sensing very small capacitance changes in capacitive sensors is presented in this paper. The proposed structure scales capacitance variation to the sensible impedance changing. The scaling factor of the circuit can be easily tuned by adjusting bias points of the transistors. In order to cancel or decrease the parasitic components, the RC feedback and input transistor cascading techniques are used in the design. To simulate the circuit, HSPICE simulator is utilized to verify the validity of the theoretical formulations in 0.18 µm technology. According to schematic and post layout simulation results input impedance changes linearly versus capacitance variations up to 0.7 GHz while the sensor capacitance changing is varied between 0~200fF. Total dc power consumption is obtained as low as 1.2 mW with 1.8 V power supply.

IEEE Transactions on Instrumentation and Measurement, 1996

A very accurate capacitance-measurement system consisting of a discrete capacitance-dependent oscillator and a microcontroller has been developed. It can measure multielectrode capacitors with capacitances up to 2 pF, with an accuracy of 100 ppm with respect to a reference capacitor. The resolution amounts to 50 aF with a total measurement time of 300 ms.

—Biomedical sensors use capacitance measurement for a variety of detection applications and capacitance measurement in the tens of femto-farad range need a low-noise environment. The capacitance sensor interface converts the ca-pacitance change to frequency change to mitigate the noise and to operate in a noisy environment. Using differential sensing architecture and calibration, the frequency domain technique allows measuring small capacitance values even in the presence of large parasitic capacitance. The impact of the voltage variation due to temperature or supply is removed by one-point calibration The test circuit was designed in 130-nm CMOS technology and the capacitance was measured for 1-100 fF having a nominal (or parasitic) capacitance of 1pF.

Journal of Physics: Conference Series, 2019

This paper focus on the development of a simple and low-cost capacitance measurement for Arduino microcontroller. The working principle of the circuit is based on the period changes of the square-wave signal, which is generated by relaxation oscillator, causes by RC values in the circuit. The relaxation oscillator is based on two different types of op-amp, rail-to-rail and comparator. The output frequency of the oscillator is about 2 kHz to 100 kHz. The range of test capacitors is approximately from 1 pF to 33 pF. The percent error of each type of op-amp due to nonlinearity and parasitic capacitance is presented. Finally, the comparison of the experimental results and theoretical analysis as well as precision LCR meter are investigated and discussed.

A new technique and circuit topology is proposed to read the output of a capacitive sensor for lab-on-chip (LOC) applications. Through capacitance-to-time conversion, together with several digital blocks, a first-order sigma-delta interface is developed. By encoding the change in capacitance as the difference in time between the rising edges of two digital signals, a compact, low-power realization is achieved. Moreover, the design is tunable along three axes: power, resolution and range. A digital calibration procedure is provided that exploits these three degrees of tuning and enables the design to be optimized for a desired capacitance range. A circuit has been fabricated in a 1-V 90-nm ST CMOS process requiring 120 μm x 20 μm footprint. Tests were conducted with on-chip capacitance ranging from 12.5 fF to 8 pF and the circuit was shown to be capable of measuring this full range of capacitance in a piecewise manner with a power consumption of 34 μW.