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Extensions to Pipelined Data Paths
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Computer Science
Distributed Systems

REAL: a program for REgister ALlocation

Profile image of Alice ParkerAlice Parker

24th ACM/IEEE conference proceedings on Design automation conference - DAC '87

Abstract

This paper describes the REAL REgister ALlocation program. REAL uses a track assignment algorithm taken from channel routing called the Left Edge algorithm. REAL is optimal for non-pipelined designs with no conditional branches. It is thought that REAL is also optimal for designs with conditional branches, pipelined or not. Experimental results are included in the report, which illustrate the optimal solutions found by REAL. REAL is part of the ADAM Advanced Design AutoMation system, and will be used to process designs output from MAHA and Sehwa.

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References (9)

  1. A. Aho and J. Ullman. Principles of Compiler Design.
  2. Addison-Wesley, Massachusets, 1977.
  3. E. Girczyc and J. Knight. An Ada to Standard Cell Hardware Compiler Based on Graph Grammars and Scheduling. In Proceedings, 1984 International Con- ference on Computer Design -ICCD, pages 726-729, October 1984.
  4. L. Hafer and A. C. Parker. Register-Transfer Level Digital Design Automation: the Allocation Process. In Design Automation Conference Proceedings no. 15, pages 213-219, IEEE and ACM, June 1978.
  5. A. Hashimoto and J. Stevens. Wire Routing by Op- timizing Channel Assignment Within Large Apertures. In Proceedings 8th DA workshop, pages 155-169, IEEE, 1971.
  6. N. Park and A. C. Parker. Synthesis of Optimal Pipeline Clocking Schemes. Technical Report DISC/85-1, Dept. of EE-Systems, University of Southern California, Jan- uary 1985.
  7. N. Park and A. C. P ar k er. Sehwa:A Program for Syn- thesis of Pipelines. ln Proceedings of the 2&d De- sign Automation Conference, pages 454460, IEEE and ACM, July 1986.
  8. A.C. Parker J. Pizarro and M. Mlinar. Maha: a pro- gram for datapath synthesis. In Proceedings of the d&d Design Automation Conference, pages 461-466, IEEE and ACM, July 1986.
  9. C.-J. Tseng and D.P. Siewiorek. Automated Synthe- sis of Data Paths in Digital Systems. IEEE Trans, on CAD, CAD-5(3):379-395, July 1986. Paper I 2.3

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Den är också effektiv då den genererar bättre maskinkod än LLVM-kompilatorn. Metoden kan tillämpas för att byta kompileringstid mot kodkvalitet utöver de vanliga optimeringsnivåerna, utforska och utnyttja processorspecifika egenskaper samt identifiera förbättringsmöjligheter i konventionella kompilatorer. A Adrián y Eleonore. Que sigamos riendo juntos por muchos años. First of all, I would like to thank my main supervisor Christian Schulte. I could not have asked for a better source of guidance and inspiration through my doctoral studies. Thanks for teaching me pretty much everything I know about research, and thanks for the opportunity to work together on such an exciting project over these many years! I am also grateful to my co-supervisors Mats Carlsson and Ingo Sander for enriching my supervision with valuable feedback, insightful discussions, and complementary perspectives. Many thanks to Laurent Michel for acting as opponent, to Krzysztof Kuchcinski, Marie Pelleau, and Konstantinos Sagonas for acting as examining committee, to Martin Monperrus for contributing to my doctoral proposal and acting as internal reviewer, and to Philipp Haller for chairing the defense. I am also very grateful to Peter van Beek and Anne Håkansson for acting as opponent and internal reviewer of my licentiate thesis. Thanks to all my colleagues (and friends) at RISE SICS and KTH for creating a fantastic research environment. In particular, thanks to my closest colleague Gabriel Hjort Blindell with whom I have shared countless failures, some successes, and many laughs. I am also grateful to Sverker Janson for stimulating and encouraging discussions, to Frej Drejhammar for supporting me day after day with technical insights and good humor, and to all interns and students from whom I have learned a lot. Thanks to Ericsson for funding my research and for providing inspiration and experience "from the trenches". The input from Patric Hedlin and Mattias Eriksson has been particularly valuable in guiding the research and keeping it focused. I also wish to thank my parents and brother for their love, understanding, and support. Last but not least I simply want to thank Eleonore, our latest family member Adrián, the rest of my Spanish family, my Swedish family, and my friends in Valencia and Stockholm for giving meaning to my life.

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Related topics

  • Computer Science
  • Distributed Computing
  • Register Allocation
  • Design Automation
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