Center for Nanotechnology Research

This paper presents a set square design which serves as a wideband Metamaterial Absorber (MA) for X-band applications. The simulation results show that the absorber has −8 dB absorption bandwidth of 2.51 GHz (8.36-10.87 GHz) and the Full Width Half Maximum (FWHM) bandwidth of 3.55 GHz (7.47-11.02 GHz). MA proposed in this paper uses FR 4 as a substrate having thickness of 1.6 mm and overall dimensions of 10 mm × 10 mm with center frequency at 9.61 GHz. The absorption mechanism which depends on effective permittivity (eff) and effective permeability (μ eff) is explained and plotted.

In this paper, a wideband Metamaterial Absorber (MA) is presented for various applications of X-band spectra. MA consists of an array of a unit cell arranged in a periodic fashion having two split square resonators printed on FR4 substrate whose relative permittivity is 4.4. The simulation result reveals that −10 dB absorption bandwidth of 5.98 GHz (from 5.94 GHz to 11.92 GHz) and the Full Width Half Maxima (FWHM) bandwidth of 7.55 GHz (from 5.58 GHz to 13.13 GHz). It has three peaks of absorption at 6.2, 8.1 and 11.1 GHz with Absorptivity of 99.59, 99.92 and 99.85%, respectively. 0.095λ 0 λ 0 The profile of absorber is low due to unit cell size dimensions of 9 mm×9 mm. The absorption mechanism is explained by taking effective electromagnetic parameters (eff and μ eff) which are reacquired. The absorber has been investigated for a wide angle of oblique incidence and for different polarization angles as well. The proposed absorber is fabricated and its Absorptivity is tested experimentally.

This paper presents a very compact simple double square shaped design of a Metamaterial Absorber (MA). The dimension of the square is 1.41×1.41mm2, and the overall dimension of the unit cell structure is 5×5mm2. A wideband of absorption is achieved from 14.44 GHz to 27.87 GHz having a bandwidth of 13.43 GHz at −10 dB, which covers the Ku (12 GHz–18 GHz) and K (18 GHz–27 GHz) bands approximately. The proposed structure finds application in the field of radar and satellite communications. The full width half maxima bandwidth achieved is 16.39 GHz (from 13.61 GHz to 30.00 GHz). Three absorption peaks are obtained at 16.54, 20.54, and 25.81 GHz with absorptivity of 99.89%, 99.95%, and 99.96%, respectively. The simulation of the proposed MA is carried out using ANSYS HFSSv19.1, and it is fabricated on FR4 (Flame Retardant) using a printed circuit board. Analysis is done under both normal incident and oblique incident for different angles. The measured and simulated results for absorption...

A compact wideband metamaterial absorber (MA) for Ku band applications is presented in this paper. Ku band is a part of a microwave frequency spectrum ranging from 12 to 18 GHz. The proposed MA absorbs incident wave from 11.39 to 20.15 GHz with a bandwidth of 8.76 GHz which fully covers the Ku band. The proposed structure is compact having an overall dimension of 10 mm × 10 mm. The structure is fabricated on theFR 4 substrate and the simulated result is carried using ANSYS HFSS 19.1. The absorption mechanism is illustrated by calculating effective electro magnetic (EM) parameters (eff & eff). Current distribution is also plotted in support of absorption mechanism. The structure is also examined at different angles (0 0-90 0) for the oblique and normal incident. The proposed MA is tested inside the Anechoic Chamber and it was found that simulated and measured result is close to each other with variation within the tolerance limit. At last comparison of the proposed MA is done with already reported MA. MA presented in this paper finds applications for satellite communication radar surveillance and other defense applications.

This paper proposes a new meta-heuristic called Jumping Spider Optimization Algorithm (JSOA), inspired by Arachnida Salticidae hunting habits. The proposed algorithm mimics the behavior of spiders in nature and mathematically models its hunting strategies: search, persecution, and jumping skills to get the prey. These strategies provide a fine balance between exploitation and exploration over the solution search space and solve global optimization problems. JSOA is tested with 20 well-known testbench mathematical problems taken from the literature. Further studies include the tuning of a Proportional-Integral-Derivative (PID) controller, the Selective harmonic elimination problem, and a few real-world single objective bound-constrained numerical optimization problems taken from CEC 2020. Additionally, the JSOA’s performance is tested against several well-known bio-inspired algorithms taken from the literature. The statistical results show that the proposed algorithm outperforms rece...

The zero band gap (Eg) graphene becomes narrow Eg semiconductor when graphene is patterned with periodic array of hexagonal shaped antidots, the resultant is the hexagonal Graphene Antidot Lattice (hGAL). Based on the number of atomic chains between antidots, hGALs can be even and odd. The even hGALs (ehGAL) are narrow Eg semiconductors and odd hGALs (ohGAL) are semi-metals. The Eg opening up by hGALs is not sufficient to operate a realistic switching transistor. Also hGAL transistors realized on Si/SiO2 substrate are suffering with low carrier mobility and ON-OFF current ratio. In order to achieve a sizable Eg with good mobility, AB Bernal stacked hGALs on hexagonal Boron Nitride (hBN), ABA Bernal stacked hBN / hGAL / hBN sandwiched structures and AB misaligned hGAL /hBN structures are reported here for the first time. Using the first principles method the electronic structure calculations are performed. A sizable Eg of about 1.04 eV (940+100 meV ) is opened when smallest neck width medium radius ehGAL supported on hBN and about 1.1 eV (940 + 200 meV ) is opened when the same  is sandwiched between hBN layers. A band gap on the order of 71 meV is opened for Bernal stacked ohGAL / hBN and nearly 142 meV opened for hBN / ohGAL /hBN structures for smallest radius and width of nine atomic chains between antidots. Unlike a misaligned graphene on hBN, the misaligned ohGAL/hBN structure shows increased  Eg. This study could open up new ways of band gap engineering for graphene based nanostructures.
Keywords: Graphene, graphene antidots, hexagonal boron nitride, band structure, band gap engineering

Single photon quantum emitters are important building blocks of optical quantum technologies. Hexagonal boron nitride (hBN), an atomically thin wide band gap two dimensional material, hosts robust, optically active luminescent point defects, which are known to reduce phonon lifetimes, promises as a stable single-photon source at room temperature. In this Review, we present the recent advances in hBN quantum light emission, comparisons with other 2D material based quantum sources and analyze the performance of hBN quantum emitters. We also discuss state-of-the-art stable single photon emitter’s fabrication in UV, visible and near IR regions, their activation, characterization techniques, photostability towards a wide range of operating temperatures and harsh environments, Density-functional theory predictions of possible hBN defect structures for single photon emission in UV to IR regions and applications of single photon sources in quantum communication and quantum photonic circuits...

The zero band gap (Eg) graphene becomes narrow Eg semiconductor when graphene is patterned with periodic array of hexagonal shaped antidots, the resultant is the hexagonal Graphene Antidot Lattice (hGAL). Based on the number of atomic chains between antidots, hGALs can be even and odd. The even hGALs (ehGAL) are narrow Eg semiconductors and odd hGALs (ohGAL) are semi-metals. The Eg opening up by hGALs is not sufficient to operate a realistic switching transistor. Also hGAL transistors realized on Si/SiO2 substrate are suffering with low carrier mobility and ON-OFF current ratio. In order to achieve a sizable Eg with good mobility, AB Bernal stacked hGALs on hexagonal Boron Nitride (hBN), ABA Bernal stacked hBN / hGAL / hBN sandwiched structures and AB misaligned hGAL /hBN structures are reported here for the first time. Using the first principles method the electronic structure calculations are performed. A sizable Eg of about 1.04 eV (940+100 meV ) is opened when smallest neck widt...

High gate leakage current, as a central problem, has decelerated the downscaling of minimum feature size of field effect transistors. In this paper, a combination of density functional theory and non equilibrium Green’s function formalism has been applied to the atomic scale calculation of tunnel currents through CeO2, Y2O3, TiO2 and Al2O3 dielectrics in MOSFETs. The tunnel currents for different bias voltages applied to Si/Insulator/Si systems have been obtained along with tunnel conductance v/s bias voltage plots for each system. The results are in agreement to the use of high dielectric constant materials as gate dielectric so as to enable further downscaling of MOSFETs with reduced gate leakage currents thereby enabling ultra large scale integration.
When used as dielectric, TiO2 exhibits extremely low tunnel currents followed by Y2O3 while CeO2 and Al2O3 exhibit high tunnel currents through them at certain bias voltages.

This paper reports the first principle simulations of Fe/SiO2/Fe and Ni/Al2O3/Ni magnetic tunnel junctions (MTJs). A performance analysis has been done based upon the device-level simulations of the two magnetic tunnel junctions followed by the circuit level simulations of magnetoresistive random access memory
(MRAM) cell operating with the two MTJs respectively. From the device-level simulations, the two MTJs have been compared with regard to the bias dependence of TMR ratios, insulator thickness dependence of TMR ratios and insulator thickness dependence of parallel and anti-parallel state resistances taking the relative magnetizations of the two ferromagnetic films of the MTJs into consideration. From the circuitlevel simulations, the static and switching power dissipations have been computed along with the delay time estimation.

The memristor is an electrical circuit element that is similar to a resistor but has the potential to maintain state between turning power on and off. These memristors are about half the size of the transistors found in current flash storage technology, allowing capacity of these devices to double. This paper discusses the basics of memristors, which is an electrical circuit element, and presents the first principle simulation results of Pt/TiO2-x - TiO2/Pt system where the central region has a boundary separating TiO2-x and TiO2 regions. This barrier is progressively shifted towards the TiO2-x region with applied bias to gradually increase the thickness of TiO2 region. A comparison of the electrical characteristics of the device when the TiO2 region is extended towards TiO2-x region is also presented. The basis of memristive behavior, the non linear hysteresis curve of memristor, has been obtained based upon the simulation results.

The work presented in this paper focuses on the
effects of high leakage current in field effect transistors and the
possible ways to play down with the leakage currents. This paper
combines density functional theory and non equilibrium Green’s
function formalism to perform atomic scale calculation of tunnel
currents through SiO2, HfO2, Ta2O5, ZrO2 and Dy2O3 dielectrics
in MOSFETs. The tunnel currents for different bias voltages
applied to Si/Insulator/Si systems have been obtained along with
tunnel conductance v/s bias voltage plots for each system and the plots have been analyzed with reference to the presently used
bulk Si/SiO2/Si systems that have SiO2 as the gate dielectric
material. The results justify the use of high dielectric constant
materials as gate dielectric in FET devices so as to enable further
downscaling of MOSFETs with reduced gate leakage currents
thereby enabling ultra large scale integration.

This paper presents a low hardware overhead test pattern generator (TPG) for scan-based
built-in self-test (BIST) that can reduce switching activity in circuits under test (CUTs)
during BIST. BIST is a device, here part of the functional device is self dedicated to selftesting
the correctness of the device. In general BIST is comprised of two TPGs: LT-RTPG
(Low Transition-Random Test Pattern Generator) and 3-Weight WRBIST (Weighted Random
Built In Self-Test). Minimization of hardware overhead is a major concern of BIST
implementation. In test-per-scan BIST, a new test pattern is applied to the inputs of the CUT
every m+1clock cycles, where m is the number of scan elements in the longest scan chain. By
using two proposed TPG increasing fault coverage is achieved through the reduction of
switching activity, thereby dissipation of power is minimized. Experimental results for
ISCAS’89 (International Symposium for Circuits and Systems) benchmark circuits show that
the proposed BIST can significantly reduce switching activity during BIST while achieving
maximum fault coverage for all ISCAS’89 benchmark circuits. In large circuit, greater
reduction in switching activity is achieved. The proposed BIST can be implemented with low
area overhead; as seen through experimental results.

Nanowire MOSFETs are recognized as one of the most promising candidates to extend Moore’s law into nanoelectronics era. This paper reviews the process, application, device physics and compact modeling of Gate All around (GAA) nanowire MOSFETs. The most widely used methods of nanowire synthesis have been discussed. The paper presents the various device optimization techniques and scaling potential of nanowire transistors. A process sensitivity study of silicon nanowire transistors at the end of the paper justifies the theory of nanowire FETs to carry forward the downscaling of MOSFETs in the sub-10 nm regime.