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Fig. 12. Output power versus input power at center frequency by changing Vds

Figure 12 Output power versus input power at center frequency by changing Vds

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EER uses a combination of a high efficiency switch-mode PA with an envelope re-modulation circuit [14]. Fig. 2 shows the block diagram of traditional EER systems. First, the RF signal is exerted to the limiter; the result is the phase modulated signal and is inputted to the switch mode PA. In another path the envelope signal is detected and is remodulated to the signal through the drain or the collector of the RF transistor. In theory, since the RF transistor is always operating in a switching mode, EER is more efficient than ET. However, the PA for a conventional EER transmitter has been designed to achieve peak efficiency at the peak drain voltage region and does not have a good efficiency at the average region. It causes a degradation of the overall efficiency of the EER transmitter [5]. Fig. 1. Envelope tracking block diagram
EER uses a combination of a high efficiency switch-mode PA with an envelope re-modulation circuit [14]. Fig. 2 shows the block diagram of traditional EER systems. First, the RF signal is exerted to the limiter; the result is the phase modulated signal and is inputted to the switch mode PA. In another path the envelope signal is detected and is remodulated to the signal through the drain or the collector of the RF transistor. In theory, since the RF transistor is always operating in a switching mode, EER is more efficient than ET. However, the PA for a conventional EER transmitter has been designed to achieve peak efficiency at the peak drain voltage region and does not have a good efficiency at the average region. It causes a degradation of the overall efficiency of the EER transmitter [5]. Fig. 1. Envelope tracking block diagram
To employ the high efficiency operation of EER and at thesame time reduce the strict necessities of bandwidth and time-alignment, the “hybrid” EER structure was proposed recently [15]. Fig. 3 shows the block diagram of the hybrid EER system, where the PA input signal is a complex-modulated signal with variable envelope like ET, but the difference is that the PA is designed to operate in the switching-mode at higher input powers. The hybrid EER has some benefits compared with traditional EER systems. It has ower RF bandwidth and envelope bandwidth requirement because its input signal is not limited. Moreover, it can provide higher gain and therefore higher average PAE and finally, it has lower sensitivity to the time-mismatch between envelope and RF path. Fig. 2. Envelope elimination and restoration block diagram
To employ the high efficiency operation of EER and at thesame time reduce the strict necessities of bandwidth and time-alignment, the “hybrid” EER structure was proposed recently [15]. Fig. 3 shows the block diagram of the hybrid EER system, where the PA input signal is a complex-modulated signal with variable envelope like ET, but the difference is that the PA is designed to operate in the switching-mode at higher input powers. The hybrid EER has some benefits compared with traditional EER systems. It has ower RF bandwidth and envelope bandwidth requirement because its input signal is not limited. Moreover, it can provide higher gain and therefore higher average PAE and finally, it has lower sensitivity to the time-mismatch between envelope and RF path. Fig. 2. Envelope elimination and restoration block diagram
current from the current source. To control the current of the voltage source, we use a hysteretic current feedback control to realize the soft power division between switch stage and linear stage amplification. Fig. 4. Mathematical behavioral model of the envelope amplifier The load voltage is controlled by the linear voltage source, and the load current is a mixture of the linear stage current and the switch stage current. Envelope amplifier block diagram is shown in Fig. 5, which consists of an OPAMP to realize the voltage source, and a MOSFET to realize the current source.
current from the current source. To control the current of the voltage source, we use a hysteretic current feedback control to realize the soft power division between switch stage and linear stage amplification. Fig. 4. Mathematical behavioral model of the envelope amplifier The load voltage is controlled by the linear voltage source, and the load current is a mixture of the linear stage current and the switch stage current. Envelope amplifier block diagram is shown in Fig. 5, which consists of an OPAMP to realize the voltage source, and a MOSFET to realize the current source.
B. Changing Vds In next step, we changed Vds of the power amplifier from 8v up to 28v by 4v to show the possibility of increase in PAE by envelope tracking. Gain, power added efficiency and Output power of the RF power versus input power at center frequency of 2.1 GHz by changing Vds from 8v up to 28v by Av is shown in Fig. 10, Fig. 11 and Fig. 12 respectively. When the input power is 10 dBm and Vds is 8y, this simulation shows about 17% of more PAE than the condition of Vds=28v. Fig. 12 shows that we can increase P1dB of the We know that increasing the output power of the transistor leads to increase in PAE. It means that we have the best efficiency in the peak power. However, our input signal has a high peak to average ratio and the probability of the peak power is very low. Consequently, it is wise to design the matching for the case that happens most of the time, which is mean power. Therefore, because Vds changes with respect to the input power, we optimize the power amplifier for the Vds related to the mean power. wan lk a a tm, « 7 eva’ a
B. Changing Vds In next step, we changed Vds of the power amplifier from 8v up to 28v by 4v to show the possibility of increase in PAE by envelope tracking. Gain, power added efficiency and Output power of the RF power versus input power at center frequency of 2.1 GHz by changing Vds from 8v up to 28v by Av is shown in Fig. 10, Fig. 11 and Fig. 12 respectively. When the input power is 10 dBm and Vds is 8y, this simulation shows about 17% of more PAE than the condition of Vds=28v. Fig. 12 shows that we can increase P1dB of the We know that increasing the output power of the transistor leads to increase in PAE. It means that we have the best efficiency in the peak power. However, our input signal has a high peak to average ratio and the probability of the peak power is very low. Consequently, it is wise to design the matching for the case that happens most of the time, which is mean power. Therefore, because Vds changes with respect to the input power, we optimize the power amplifier for the Vds related to the mean power. wan lk a a tm, « 7 eva’ a
Fig. 10. Gain versus input power at center frequency by changing Vds Fig. 11. PAE versus input power at center frequency by changing Vds
Fig. 10. Gain versus input power at center frequency by changing Vds Fig. 11. PAE versus input power at center frequency by changing Vds
transistor when the input power is large by applying ET. Fig. 8. Power Added Efficiency versus frequency
transistor when the input power is large by applying ET. Fig. 8. Power Added Efficiency versus frequency
Fig. 14. Gain versus input power at center frequency by applying envelope tracking Fig. 13. PAE versus input power at center frequency by applying envelope tracking
Fig. 14. Gain versus input power at center frequency by applying envelope tracking Fig. 13. PAE versus input power at center frequency by applying envelope tracking
When Vds is 8v the PAE decreases in the peak power, and when Vds is 28v the PAE is low in weak power. To overcome this problem, we can apply envelope tracking to our amplifier. By changing the Vds with respect to the input power, we can see that the PAE remains above 50% for a wide range of input power. Fig. 13 and Fig. 14 show PAE and Gain versus input power at center frequency by applying envelope tracking respectively.
When Vds is 8v the PAE decreases in the peak power, and when Vds is 28v the PAE is low in weak power. To overcome this problem, we can apply envelope tracking to our amplifier. By changing the Vds with respect to the input power, we can see that the PAE remains above 50% for a wide range of input power. Fig. 13 and Fig. 14 show PAE and Gain versus input power at center frequency by applying envelope tracking respectively.
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