Academia.eduAcademia.edu

Figure 84 – uploaded by Yang Qi

See full PDFdownloadDownload figure
consequence, the proposed distributed control strategy cannot be performed well.

Figure 84 consequence, the proposed distributed control strategy cannot be performed well.

Related Figures (113)

Nomenclature
Nomenclature
decade and this penetration level will be likely to grow in the coming years.
decade and this penetration level will be likely to grow in the coming years.
Fig. 1.3. Functions of ESS in terms of peak shaving and load leveling.
Fig. 1.3. Functions of ESS in terms of peak shaving and load leveling.
Fig. 1.4. Grid energy storage technologies and applications. [11]
Fig. 1.4. Grid energy storage technologies and applications. [11]
Fig. 1.5. Circuit configuration of a two-level VSIs. (a) Single phase. (b) Three phase.
Fig. 1.5. Circuit configuration of a two-level VSIs. (a) Single phase. (b) Three phase.
and control block diagram of the grid-feeding VSI.
and control block diagram of the grid-feeding VSI.
solution for the 100% power-converter-based system.
solution for the 100% power-converter-based system.
various control algorithms.
various control algorithms.
Fig. 2.1. Typical islanded AC microgrid with DESSs. chapter only focuses on linear load power sharing.
Fig. 2.1. Typical islanded AC microgrid with DESSs. chapter only focuses on linear load power sharing.
system equivalent circuit at the fundamental frequency. However, this principle does not work for reactive power sharing. Fig. 2.2 shows the
system equivalent circuit at the fundamental frequency. However, this principle does not work for reactive power sharing. Fig. 2.2 shows the
impedances. (b) Impact of sensor scaling errors.
impedances. (b) Impact of sensor scaling errors.
Fig. 2.4. Bipolar SPWM modulation scheme and current paths for an H-bridge VSI. voltage polarity is negative during the time interval Az, and positive during Ata.
Fig. 2.4. Bipolar SPWM modulation scheme and current paths for an H-bridge VSI. voltage polarity is negative during the time interval Az, and positive during Ata.
Fig. 2.5. Additional harmonics imposed by the dead-time effect. (a). Magnitude
Fig. 2.5. Additional harmonics imposed by the dead-time effect. (a). Magnitude
is also implemented to shape the VSI output impedance. As shown in Fig. 2.6(b), the dead-time effect is equivalently modeled by an additional
is also implemented to shape the VSI output impedance. As shown in Fig. 2.6(b), the dead-time effect is equivalently modeled by an additional
VSI output impedance Z, (s) can be shaped to be inductive at the harmonic frequency. current of the load impedance Z;. By properly designing the virtual impedance Z,(s), the
VSI output impedance Z, (s) can be shaped to be inductive at the harmonic frequency. current of the load impedance Z;. By properly designing the virtual impedance Z,(s), the
Fig. 2.8. Phasor diagram of the equivalent circuit. From Fig. 2.7 and Fig. 2.8, the magnitudes of io1-, and ig2., are calculated as
Fig. 2.8. Phasor diagram of the equivalent circuit. From Fig. 2.7 and Fig. 2.8, the magnitudes of io1-, and ig2., are calculated as
From the above analysis, the VSI with a leading harmonic voltage phasor will yield a For ease of statement, the nun-fundamental active power, which is the dot product of positive P;-, value while the VSI with a lagging harmonic voltage phasor would have a
From the above analysis, the VSI with a leading harmonic voltage phasor will yield a For ease of statement, the nun-fundamental active power, which is the dot product of positive P;-, value while the VSI with a lagging harmonic voltage phasor would have a
Fig. 2.9. Proposed control strategy and its operating principle. (a) Proposed control ‘oltage magnitude V through a simple integral controller, and k, is the integral gain.
Fig. 2.9. Proposed control strategy and its operating principle. (a) Proposed control ‘oltage magnitude V through a simple integral controller, and k, is the integral gain.
shown by the red solid line in Fig. 2.10.
shown by the red solid line in Fig. 2.10.
Table 2.1 Parameters for the system initial state
Table 2.1 Parameters for the system initial state
Fig. 2.11. Power-sharing results for two parallel VSIs.
Fig. 2.11. Power-sharing results for two parallel VSIs.
Fig. 2.12. Power-sharing performance when a new VSI is added to the microgrid. VSIs in the steady state.
Fig. 2.12. Power-sharing performance when a new VSI is added to the microgrid. VSIs in the steady state.
Fig. 2.13. Laboratory setup for experimental verification. below.
Fig. 2.13. Laboratory setup for experimental verification. below.
3rd-order circulating harmonic currents so that io, and io2 are distorted. Fig. 2.14. VSI output currents without the proposed control scheme.
3rd-order circulating harmonic currents so that io, and io2 are distorted. Fig. 2.14. VSI output currents without the proposed control scheme.
contains less harmonic distortions (THD=1.6%). Fig. 2.15. Dynamic response of the VSI output fundamental powers.
contains less harmonic distortions (THD=1.6%). Fig. 2.15. Dynamic response of the VSI output fundamental powers.
Fig. 2.17. VSI output currents with the proposed control scheme.
Fig. 2.17. VSI output currents with the proposed control scheme.
Fig. 2.16. Dynamic responses of P;-3.
Fig. 2.16. Dynamic responses of P;-3.
Fig. 2.18. VSI output currents without the proposed control scheme.
Fig. 2.18. VSI output currents without the proposed control scheme.
Fig. 2.19. VSI output currents with the proposed control scheme.
Fig. 2.19. VSI output currents with the proposed control scheme.
Fig. 2.20. VSI output currents without the proposed control scheme.
Fig. 2.20. VSI output currents without the proposed control scheme.
Fig. 2.21. VSI output currents with the proposed control scheme.
Fig. 2.21. VSI output currents with the proposed control scheme.
scheme contains a power-loop control as well as a voltage-feedback control. jabe-m AN Vabc-m are the measured VSI output currents and voltages. The entire VSI contro! The power-loop control is adopted to facilitate the active and reactive power sharin,
scheme contains a power-loop control as well as a voltage-feedback control. jabe-m AN Vabc-m are the measured VSI output currents and voltages. The entire VSI contro! The power-loop control is adopted to facilitate the active and reactive power sharin,
and gy are the associated phase angles. Their values are calculated as From (3.13) and (3.14), the existence of scaling errors Aka, Ak, and Ak, will differ V, where Vp and Vy represent the positive- and negative-sequence voltage magnitudes; 9; from Vrand make Vy nonzero. To quantify the effect of voltage measurement errors, Fig
and gy are the associated phase angles. Their values are calculated as From (3.13) and (3.14), the existence of scaling errors Aka, Ak, and Ak, will differ V, where Vp and Vy represent the positive- and negative-sequence voltage magnitudes; 9; from Vrand make Vy nonzero. To quantify the effect of voltage measurement errors, Fig
Fig. 3.2. Impacts of scaling errors Ak, and Ak.. (a) Value of V,. (b) Value of Vy.
Fig. 3.2. Impacts of scaling errors Ak, and Ak.. (a) Value of V,. (b) Value of Vy.
where 7; is the sampling frequency. Moreover, LC filter impedances Z;(s) and Zc(s) are architecture. (b). For the fundamental frequency. (c) For harmonic frequencies.
where 7; is the sampling frequency. Moreover, LC filter impedances Z;(s) and Zc(s) are architecture. (b). For the fundamental frequency. (c) For harmonic frequencies.
Fig. 3.5. Bode diagrams of T (s), Cy =15 uF, Ly =1 mH, r =0.2 Q, and 7; =100 us. than the critical frequency @,/6 [101].
Fig. 3.5. Bode diagrams of T (s), Cy =15 uF, Ly =1 mH, r =0.2 Q, and 7; =100 us. than the critical frequency @,/6 [101].
Fig. 3.6. System equivalent circuit at the Ath-order harmonic-frequency domain. the harmonic currents of the two VSIs. Ath-order harmonic frequency, where ij; is the total load harmonic current, i; and in2 are
Fig. 3.6. System equivalent circuit at the Ath-order harmonic-frequency domain. the harmonic currents of the two VSIs. Ath-order harmonic frequency, where ij; is the total load harmonic current, i; and in2 are
fed to the PWM unit.
fed to the PWM unit.
Fig. 3.8. VSI equivalent circuit as affected by the feedforward control. To further improve the fundamental power sharing, the value of Z,.7is designed to be
Fig. 3.8. VSI equivalent circuit as affected by the feedforward control. To further improve the fundamental power sharing, the value of Z,.7is designed to be
the PCC voltage magnitude. Perturbing (3.42) and (3.43) gives
the PCC voltage magnitude. Perturbing (3.42) and (3.43) gives
further simplified in Fig. 3.10. where the equivalent block diagram G-, (s) is derived as Fig. 3.9. A small-signal model of the droop control. Based on (3.42) and (3.46), the overall system model is established in Fig. 3.9 and
further simplified in Fig. 3.10. where the equivalent block diagram G-, (s) is derived as Fig. 3.9. A small-signal model of the droop control. Based on (3.42) and (3.46), the overall system model is established in Fig. 3.9 and
Fig. 3.10. Simplified small-signal model of the droop control.
Fig. 3.10. Simplified small-signal model of the droop control.
with a guaranteed stability margin. Fig. 3.11. Bode diagrams of 7,(s) with different Xz values. phase angle may be oscillatory and even unstable. Normally, a 60-degree PM is preferred
with a guaranteed stability margin. Fig. 3.11. Bode diagrams of 7,(s) with different Xz values. phase angle may be oscillatory and even unstable. Normally, a 60-degree PM is preferred
Table 3.1 System and control parameters
Table 3.1 System and control parameters
Table 3.2 Sensor measurement errors
Table 3.2 Sensor measurement errors
during Stage 1 but much smaller after the proposed control scheme is enabled. Fig. 3.15 displays zoomed-in views of VSI voltages. In Fig. 3.15(a), the conventional
during Stage 1 but much smaller after the proposed control scheme is enabled. Fig. 3.15 displays zoomed-in views of VSI voltages. In Fig. 3.15(a), the conventional
Fig. 3.15. Zoomed-in VSI voltage waveforms. (a) Conventional voltage-feedback control scheme. It can be observed that the impacts of voltage measurement errors are
Fig. 3.15. Zoomed-in VSI voltage waveforms. (a) Conventional voltage-feedback control scheme. It can be observed that the impacts of voltage measurement errors are
performance can always be maintained. Fig. 3.16. Dynamic responses of unbalanced and harmonic power sharing.
performance can always be maintained. Fig. 3.16. Dynamic responses of unbalanced and harmonic power sharing.
Fig. 3.17. VSI current waveforms during different stages.
Fig. 3.17. VSI current waveforms during different stages.
Fig. 3.18. Photo of the laboratory hardware setup.
Fig. 3.18. Photo of the laboratory hardware setup.
Fig. 3.19. VSI currents with the conventional voltage-feedback control microgrids with a much higher voltage level.
Fig. 3.19. VSI currents with the conventional voltage-feedback control microgrids with a much higher voltage level.
Fig. 3.20. VSI currents with the proposed control scheme. fundamental power sharing between the two VSIs.
Fig. 3.20. VSI currents with the proposed control scheme. fundamental power sharing between the two VSIs.
Fig. 3.21. VSI currents with the conventional voltage-feedback control. and harmonic currents can also be properly shared by the proposed control scheme. the small differences between VSI output currents suggest that the negative-sequence
Fig. 3.21. VSI currents with the conventional voltage-feedback control. and harmonic currents can also be properly shared by the proposed control scheme. the small differences between VSI output currents suggest that the negative-sequence
Fig. 3.22. VSI currents with the proposed control scheme.
Fig. 3.22. VSI currents with the proposed control scheme.
Fig. 3.23. PCC voltage waveforms with the proposed control scheme.
Fig. 3.23. PCC voltage waveforms with the proposed control scheme.
to be proportionally shared among multiple VSIs according to their power ratings.
to be proportionally shared among multiple VSIs according to their power ratings.
Fig. 4.2. Equivalent model of an islanded microgrid at the hth-order harmonic angle of Z,(hwo) is mainly determined by the filter parameters as well as the controlle:
Fig. 4.2. Equivalent model of an islanded microgrid at the hth-order harmonic angle of Z,(hwo) is mainly determined by the filter parameters as well as the controlle:
From (4.8), the circulating harmonic currents can be eliminated under the condition
From (4.8), the circulating harmonic currents can be eliminated under the condition
Fig. 4.5. Overall circuit and control block diagram. In Fig. 4.5, Gy(s) consists of multiple band-pass filters, which can be expressed as At selective harmonic frequencies (s = jha@o), the reference voltage v,er(jha@o) can be
Fig. 4.5. Overall circuit and control block diagram. In Fig. 4.5, Gy(s) consists of multiple band-pass filters, which can be expressed as At selective harmonic frequencies (s = jha@o), the reference voltage v,er(jha@o) can be
Fig. 4.6. System and control block diagram of the inner-loop repetitive controller. is designed and shown in Fig. 4.6. in Fig. 4.6, z’ refers to the time delay unit, where N is the number of samples in on¢ that v,ercan be accurately tracked at selective harmonic frequencies. To effectively com-
Fig. 4.6. System and control block diagram of the inner-loop repetitive controller. is designed and shown in Fig. 4.6. in Fig. 4.6, z’ refers to the time delay unit, where N is the number of samples in on¢ that v,ercan be accurately tracked at selective harmonic frequencies. To effectively com-
Table 4.1 Parameters for the inner-loop voltage controller Taking both the stability and the dynamic response into account, the repetitive control in Table 4.1.
Table 4.1 Parameters for the inner-loop voltage controller Taking both the stability and the dynamic response into account, the repetitive control in Table 4.1.
Fig. 4.7. Nyquist plot of O(z) — k-G,(z)z* with different k.
Fig. 4.7. Nyquist plot of O(z) — k-G,(z)z* with different k.
control is not considered due to its slow dynamic response.
control is not considered due to its slow dynamic response.
impedance-shaping control ensures the 3rd-order harmonic power-sharing accuracy. transient performance. (c) steady-state performance. Fig. 4.9 illustrates the VSI inductance regulation process, during which the fast R-axis impedance-shaping control can be used to equalize the rated effective inductances for
impedance-shaping control ensures the 3rd-order harmonic power-sharing accuracy. transient performance. (c) steady-state performance. Fig. 4.9 illustrates the VSI inductance regulation process, during which the fast R-axis impedance-shaping control can be used to equalize the rated effective inductances for
Fig. 4.10. System equivalent circuit at selective harmonic frequencies. modeled by multiple parallel harmonic current sources (7, i°1, i’1...). Without loss of generality, nonlinear loads can be lumped together and equivalently According to the Superposition theorem, the Ath-order (A =3,5,7...) harmonic current
Fig. 4.10. System equivalent circuit at selective harmonic frequencies. modeled by multiple parallel harmonic current sources (7, i°1, i’1...). Without loss of generality, nonlinear loads can be lumped together and equivalently According to the Superposition theorem, the Ath-order (A =3,5,7...) harmonic current
shaping control can be established as Combing the controller model and the plant model together, the linearized system shaping controllers. With this assumption, the small-signal model of the impedance-
shaping control can be established as Combing the controller model and the plant model together, the linearized system shaping controllers. With this assumption, the small-signal model of the impedance-
The detailed expression of the matrix Ainy is provided hereinafter
The detailed expression of the matrix Ainy is provided hereinafter
It has been widely accepted that the system dynamic and stability can be reflected by
It has been widely accepted that the system dynamic and stability can be reflected by
loci when k, = 0.01, and ka increases from 50 to 150. Fig. 4.11. Loci of dominant eigenvalues when k, = 0.01 and ka changes from 50 to 150.
loci when k, = 0.01, and ka increases from 50 to 150. Fig. 4.11. Loci of dominant eigenvalues when k, = 0.01 and ka changes from 50 to 150.
of k, is selected as 0.01 in this chapter. Fig. 4.12. Loci of dominant eigenvalues when ka = 100 and k, changes from 0.005 to
of k, is selected as 0.01 in this chapter. Fig. 4.12. Loci of dominant eigenvalues when ka = 100 and k, changes from 0.005 to
neighbors through low-bandwidth communication links (20 Hz bandwidth).
neighbors through low-bandwidth communication links (20 Hz bandwidth).
Fig. 4.14. Simulation results when VSIs have equal ratings. (Siv: Sov: S3v =1:1:1) impedance shaping control can still accurately share the load current with respect to the
Fig. 4.14. Simulation results when VSIs have equal ratings. (Siv: Sov: S3v =1:1:1) impedance shaping control can still accurately share the load current with respect to the
Fig. 4.15. Simulation results when VSIs have unequal ratings. (Siv: Sov: S3v =3:2:1)
Fig. 4.15. Simulation results when VSIs have unequal ratings. (Siv: Sov: S3v =3:2:1)
Fig. 4.14. Laboratory setup for the experimental verification. nonlinear loads, and loss of communication links.
Fig. 4.14. Laboratory setup for the experimental verification. nonlinear loads, and loss of communication links.
Table 4.2 Current FFT analysis result
Table 4.2 Current FFT analysis result
control is enabled, and VSI output currents are gradually equalized in the steady state. Fig. 4.15. Experimental result when all three VSIs have the same power ratings.
control is enabled, and VSI output currents are gradually equalized in the steady state. Fig. 4.15. Experimental result when all three VSIs have the same power ratings.
Table 4.3 Current FFT analysis result
Table 4.3 Current FFT analysis result
each other, but the magnitude of io2 is twice as much as that of io: and ig3.
each other, but the magnitude of io2 is twice as much as that of io: and ig3.
Fig. 4.17. Experimental result under variable line impedances. currents are equalized again.
Fig. 4.17. Experimental result under variable line impedances. currents are equalized again.
Fig. 4.20. Experimental result for multiple nonlinear loads.
Fig. 4.20. Experimental result for multiple nonlinear loads.
Fig. 4.21. Experimental result under a single communication link failure.
Fig. 4.21. Experimental result under a single communication link failure.
Fig. 4.22. Experimental result under multiple communication link failures.
Fig. 4.22. Experimental result under multiple communication link failures.
Fig. 5.1. Circuit configuration of a grid-connected VSI. can be installed at the AC output of the VSI.
Fig. 5.1. Circuit configuration of a grid-connected VSI. can be installed at the AC output of the VSI.
According to (5.4)-(5.7), the perturbed VSI active and reactive powers are calculated
According to (5.4)-(5.7), the perturbed VSI active and reactive powers are calculated
Ai, are also functions of AV; and Ad. Hence, AP;,;; can be generally expressed as
Ai, are also functions of AV; and Ad. Hence, AP;,;; can be generally expressed as
happens in practical situations. Fig. 5.2. High-entropy model of a grid-connected VSI. grid frequency wg will change according to the delivered active power Pz, as it usually
happens in practical situations. Fig. 5.2. High-entropy model of a grid-connected VSI. grid frequency wg will change according to the delivered active power Pz, as it usually
Z;(s) 1s the source output impedance and Z,(s) is the input impedance of the load system. Fig. 5. 3. shows the small-signal representation of the interconnected system, where The current flowing from the source to the load is expressed as 5.3.1. Middlebrook Criterion
Z;(s) 1s the source output impedance and Z,(s) is the input impedance of the load system. Fig. 5. 3. shows the small-signal representation of the interconnected system, where The current flowing from the source to the load is expressed as 5.3.1. Middlebrook Criterion
Fig. 5.4. Power-flow representation of Middlebrook Criterion. this analogy, Fig. 5.4 shows the power-flow representation of the Middlebrook Criterion. and the power will flow from the leading phase angle to the lagging one. According to
Fig. 5.4. Power-flow representation of Middlebrook Criterion. this analogy, Fig. 5.4 shows the power-flow representation of the Middlebrook Criterion. and the power will flow from the leading phase angle to the lagging one. According to
Fig. 5.5. Small-signal model of the proposed FRI technique. equivalent damping coefficient. Fig. 5.5 shows the small-signal model of the proposed Perturbing (5.20) yields
Fig. 5.5. Small-signal model of the proposed FRI technique. equivalent damping coefficient. Fig. 5.5 shows the small-signal model of the proposed Perturbing (5.20) yields
Fig. 5.6. A flow-chart of the FRI technique.
Fig. 5.6. A flow-chart of the FRI technique.
Fig. 5.7. Circuit and control diagrams of the case study. (a). Overall circuit determined and subsequently tracked by fast inner-loop controls.
Fig. 5.7. Circuit and control diagrams of the case study. (a). Overall circuit determined and subsequently tracked by fast inner-loop controls.
Table 5.1 System Parameter Values For the hardware setup, a voltage-controlled VSI is adopted to perfectly simulate the Notice that the SM and VSI are designed to have equal power ratings.
Table 5.1 System Parameter Values For the hardware setup, a voltage-controlled VSI is adopted to perfectly simulate the Notice that the SM and VSI are designed to have equal power ratings.
given as
given as
Fig. 5.9. VSI output current waveforms with a 5 Hz @inj.
Fig. 5.9. VSI output current waveforms with a 5 Hz @inj.
acquired Bode diagram and the comparison with theoretical analysis. for the entire low-frequency range, i.e., from 0.05 Hz to 20 Hz. Fig. 5.11 illustrates the
acquired Bode diagram and the comparison with theoretical analysis. for the entire low-frequency range, i.e., from 0.05 Hz to 20 Hz. Fig. 5.11 illustrates the
PM. However, when t equals 1.2, the system becomes unstable due to a negative PM.
PM. However, when t equals 1.2, the system becomes unstable due to a negative PM.
negative PM is introduced when t equals 1.2. Fig. 5.13. Simulated active power responses with different VSI inertia constants.
negative PM is introduced when t equals 1.2. Fig. 5.13. Simulated active power responses with different VSI inertia constants.
indicates good stability.
indicates good stability.
shown in Fig. 5.15. Fig. 5.13. VSI phase A current waveform after a step load change (t=0.6).
shown in Fig. 5.15. Fig. 5.13. VSI phase A current waveform after a step load change (t=0.6).
Fig. 5.14. Dynamic responses of power and angle difference (t=0.6).
Fig. 5.14. Dynamic responses of power and angle difference (t=0.6).
enters a new equilibrium point. Fig. 5.15. Bode diagrams of frequency-power characteristics (t=0.15).
enters a new equilibrium point. Fig. 5.15. Bode diagrams of frequency-power characteristics (t=0.15).
Fig. 5.16. VSI phase A current waveform after a step load change (t=0.15).
Fig. 5.16. VSI phase A current waveform after a step load change (t=0.15).
Fig. 5.17. Dynamic responses of power and angle difference (t=0.15)
Fig. 5.17. Dynamic responses of power and angle difference (t=0.15)
with n multiple VSIs. Fig. 5.20. Illustration for the grid integration of a new VSI.
with n multiple VSIs. Fig. 5.20. Illustration for the grid integration of a new VSI.
Related topics:
Power QualityDistributed GenerationGrid Connected Power ConvertersPower Electronics ConverterDistributed generation & energy storage systems
580 California St., Suite 400
San Francisco, CA, 94104
© 2025 Academia. All rights reserved