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Figure 5. Normalized Total Time vs. Prefetch Distance, as Geometric Mean of DaCapo, SPECjvm98 and Psuedojbb. Four Combinations of Edge and Node Enqueuing and Side and Header Metadata Are Shown. Measured In a Generous Heap (3 x Minimum).

Figure 5 Normalized Total Time vs. Prefetch Distance, as Geometric Mean of DaCapo, SPECjvm98 and Psuedojbb. Four Combinations of Edge and Node Enqueuing and Side and Header Metadata Are Shown. Measured In a Generous Heap (3 x Minimum).

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Table 2. GC Throughput in MB/s In this comparison we use the same baseline MMTk MarkSweep configuration that is used throughout the rest of the paper—the node-enqueuing collector with a mark bit
Table 2. GC Throughput in MB/s In this comparison we use the same baseline MMTk MarkSweep configuration that is used throughout the rest of the paper—the node-enqueuing collector with a mark bit
Table 3. Comparative Cost of Various Scenarios for Four Design Points, Normalized to Header/Synchronized. Table 4. Cost of The Mark Mechanism Alone for Four Design Points, Each Normalized to Cost of Entire Mark Scenario. variants, on the Pentium-M and AMD platforms, with all data normalized to the header/sync time on the respective platform. Recall that the mark scenario only differs from the full tracing loop in that it does not enqueue the marked child (compare Figure 2 lines 7 to 11 and Figure 3(f) lines 3 to 7). The mark scenario thus provides a reasonable base- line. Table 5 includes and expands upon this data by pro- viding retired instructions (RI), L1 cache misses, and L2 cache misses. In Table 5 the data is normalized against the mark scenario for each respective implementation variant (i.e. each column is normalized to the bottom row).
Table 3. Comparative Cost of Various Scenarios for Four Design Points, Normalized to Header/Synchronized. Table 4. Cost of The Mark Mechanism Alone for Four Design Points, Each Normalized to Cost of Entire Mark Scenario. variants, on the Pentium-M and AMD platforms, with all data normalized to the header/sync time on the respective platform. Recall that the mark scenario only differs from the full tracing loop in that it does not enqueue the marked child (compare Figure 2 lines 7 to 11 and Figure 3(f) lines 3 to 7). The mark scenario thus provides a reasonable base- line. Table 5 includes and expands upon this data by pro- viding retired instructions (RI), L1 cache misses, and L2 cache misses. In Table 5 the data is normalized against the mark scenario for each respective implementation variant (i.e. each column is normalized to the bottom row).
Table 5. Costs for Four Designs, Showing Time, Retired Instructions, L1 & L2 Misses, Normalized to Each Mark Scenario.
Table 5. Costs for Four Designs, Showing Time, Retired Instructions, L1 & L2 Misses, Normalized to Each Mark Scenario.
Figure 4. Normalized GC Time vs. Prefetch Distance, as Geometric Mean of DaCapo, SPECjvm98 and Psuedojbb. Fout Combinations of Edge and Node Enqueuing and Side and Header Metadata Are Shown.
Figure 4. Normalized GC Time vs. Prefetch Distance, as Geometric Mean of DaCapo, SPECjvm98 and Psuedojbb. Fout Combinations of Edge and Node Enqueuing and Side and Header Metadata Are Shown.
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