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Figure 2(a): 2-Input AND gate

Figure 2 (a): 2-Input AND gate

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Figure 1: Schematic of the Internet based tutoring system We present a web-based system aimed at teaching logic design concepts and practices for computer science and engineering stu- dents. The online lab was implemented using LabVIEW pro- gramming language because it is best suited for the project’s pur- poses due to its straightforwardness and serviceability, fast devel- opment times and the ability to create stand-alone executables. Design, architecture, and instructional method are outlined as well as the implementation of this classroom-lab course, utilized by electrical engineering students at Princess Sumaya University for Technology, which will serve as a hub for other universities in the region and abroad.
Figure 1: Schematic of the Internet based tutoring system We present a web-based system aimed at teaching logic design concepts and practices for computer science and engineering stu- dents. The online lab was implemented using LabVIEW pro- gramming language because it is best suited for the project’s pur- poses due to its straightforwardness and serviceability, fast devel- opment times and the ability to create stand-alone executables. Design, architecture, and instructional method are outlined as well as the implementation of this classroom-lab course, utilized by electrical engineering students at Princess Sumaya University for Technology, which will serve as a hub for other universities in the region and abroad.
Figure 2(d): 1-bit Full Adder
Figure 2(d): 1-bit Full Adder
A data acquisition (DAQ) board accomplishes control of instru- ments and acquisition of data. The processes are summarized in figs. 3(a-d) Specific components of the block diagram for electri- cal and other experiments, can be found in [13, 14]. The LabVIEW Web Server is used to publish images of front panels on the Web. By default, after the Web Server is started all VIs are visible to every Web browser. However, access can be limited to the published front panels and the visibility of VIs on the Web can be adjusted. For displaying front panels on the Web, the VIs must be in memory on the client computer. The Web Pub- lishing Tool is used to create an HTML document and embed static and animated images of the front panel. Images can also be embedded in an existing HTML document.
A data acquisition (DAQ) board accomplishes control of instru- ments and acquisition of data. The processes are summarized in figs. 3(a-d) Specific components of the block diagram for electri- cal and other experiments, can be found in [13, 14]. The LabVIEW Web Server is used to publish images of front panels on the Web. By default, after the Web Server is started all VIs are visible to every Web browser. However, access can be limited to the published front panels and the visibility of VIs on the Web can be adjusted. For displaying front panels on the Web, the VIs must be in memory on the client computer. The Web Pub- lishing Tool is used to create an HTML document and embed static and animated images of the front panel. Images can also be embedded in an existing HTML document.
After they have been published, the experiments can be accessed and controlled remotely via the internet. Figure 3(c): 2 Bit by Bit Binary Multiplier
After they have been published, the experiments can be accessed and controlled remotely via the internet. Figure 3(c): 2 Bit by Bit Binary Multiplier
A number of basic logic gates and other chips are virtually as- sembled to form a logic design lab using LabVIEW software. These include inverters, AND, NAND, OR, NOR, XOR, XNOR gates, in addition to decoders (cf. figure 2(b)), encoders, multi- plexers (cf. figure 2(c)) and demultiplexers, full adders (cf. figure 2(d)), 7-segment decoders, a 4-bit arithmetic-logic unit (ALU), flip-flops and counters.
A number of basic logic gates and other chips are virtually as- sembled to form a logic design lab using LabVIEW software. These include inverters, AND, NAND, OR, NOR, XOR, XNOR gates, in addition to decoders (cf. figure 2(b)), encoders, multi- plexers (cf. figure 2(c)) and demultiplexers, full adders (cf. figure 2(d)), 7-segment decoders, a 4-bit arithmetic-logic unit (ALU), flip-flops and counters.
Figure 4(d): 8 bit counter. An arithmetic-logic unit [16] performs many different arithmetic and logic operations as shown in figure (4). This 8-bit ALU per- forms arithmetic which include addition, subtraction, decrement, increment and logic operations which include inversion, AND, OR, XOR, etc. The selection lines Si are used to select the re- quired operation, thus forming what may be referred to as the machine language of the ALU.
Figure 4(d): 8 bit counter. An arithmetic-logic unit [16] performs many different arithmetic and logic operations as shown in figure (4). This 8-bit ALU per- forms arithmetic which include addition, subtraction, decrement, increment and logic operations which include inversion, AND, OR, XOR, etc. The selection lines Si are used to select the re- quired operation, thus forming what may be referred to as the machine language of the ALU.
An SR or “set/reset” flip-flop is triggered to a high state at O by the "set" signal and holds it until the reset signal is set to low by
An SR or “set/reset” flip-flop is triggered to a high state at O by the "set" signal and holds it until the reset signal is set to low by
through the selection lines to perform addition, subtraction, .etc. Data is first transmitted to the chip, through a “write operation”, the output is then received from the chip through a “read opera- tion”, and the output is finally displayed on the interface.
through the selection lines to perform addition, subtraction, .etc. Data is first transmitted to the chip, through a “write operation”, the output is then received from the chip through a “read opera- tion”, and the output is finally displayed on the interface.
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Electrical EngineeringInformation TechnologyDigital ElectronicsComputational Science and EngineeringINFORMATION TECHNOLOGY EDUCATIONDigital LogicIT EducationLogic DesignSequential Logic Circuits
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