L2C2: Logic-based LSC Consistency Checking

Formal Methods in System Design, 2001

While message sequence charts (MSCs) are widely used in industry to document the interworking of processes or objects, they are expressively weak, being based on the modest semantic notion of a partial ordering of events as defined, e.g., in the ITU standard. A highly expressive and rigorously defined MSC language is a must for serious, semantically meaningful tool support for use-cases and scenarios. It is also a prerequisite to addressing what we regard as one of the central problems in behavioral specification of systems: relating scenario-based inter-object specification to state-machine intra-object specification. This paper proposes an extension of MSCs, which we call live sequence charts (or LSCs), since our main extension deals with specifying "liveness", i.e., things that must occur. In fact, LSCs allow the distinction between possible and necessary behavior both globally, on the level of an entire chart and locally, when specifying events, conditions and progress over time within a chart. This makes it possible to specify forbidden scenarios, for example, and enables naturally specified structuring constructs such as subcharts, branching and iteration.

The problem of relating inter-agent (or, intraobject) behaviour descriptions with scenario-based interobject behaviour models has recently focused much interest. This paper compiles the results of our investigation of this problem. As specification, we consider a simple variant of Live Sequence Charts (LSC), which belong to the broad family of Sequence Charts Languages (MSC, UML 2.0 Interaction Diagrams, ...). As intra-object specification, we consider a game-theoretic foundation, looking at agents as "strategies". This encompasses the popular "state machine" specification of behaviour. We consider two kinds of relationships: synthesis and verification. We present the theoretical stage, which highlights that these problems are intrinsically difficult and put these in perspective by presenting some practical approaches and an implementation.

2008

BRIGHAM YOUNG UNIVERSITY As chair of the candidate's graduate committee, I have read the dissertation of Rahul Kumar in its final form and have found that 1. its format, citations, and bibliographical style are consistent and acceptable and fulfill university and department style requirements; 2. its illustrative materials including figures, tables, and charts are in place; and 3. the final manuscript is satisfactory to the graduate committee and is ready for submission to the university library. Date Eric G Mercer Chair, Graduate Committee

Proceedings of the 11th ACM SIGPLAN conference on Principles and practice of declarative programming - PPDP '09, 2009

Live sequence charts (LSCs) have been proposed as an interobject scenario-based specification and visual programming language for reactive systems. In this paper, we introduce a logic-based framework to check the consistency of an LSC specification. An LSC simulator has been implemented in logic programming, utilizing a memoized depth-first search strategy, to show how a reactive system in LSCs would response to a set of external event sequences. A formal notation is defined to specify external event sequences, extending the regular expression with a parallel operator and a testing control. The parallel operator allows interleaved parallel external events to be tested in LSCs simultaneously; while the testing control provides users to a new approach to specify and test certain temporal properties (e.g., CTL formula) in a form of LSC. Our framework further provides either a state transition graph or a failure trace to justify the consistency checking results.

Lecture Notes in Computer Science, 2004

The language of Message Sequence Charts (MSC) is a wellestablished visual formalism which is typically used to capture scenarios in the early stages of system development. But when it comes to rigorous requirements capturing, in particular in the context of formal verification, serious deficiencies emerge: MSCs do not provide means to distinguish mandatory and possible behavior, for example to demand that a communication is required to finally occur. The Live Sequence Chart (LSC) language introduces the distinction between mandatory and possible on the level of the whole chart and for the elements messages, locations, and conditions. Furthermore they provide means to specify the desired activation time by an activation condition or by a whole communication sequence, called pre-chart. We present the current stage of LSC language and a sketch of its formal semantics in terms of Timed Büchi Automata.

Proceedings of the 2nd International Conference on Model-Driven Engineering and Software Development, 2014

We propose a semantics for Sequence Diagrams based on the COMPASS Modelling Language (CML): a formal specification language to model systems of systems. A distinguishing feature of our semantics is that it is defined as part of a larger effort to define the semantics of several diagrams of SysML, a UML profile for systems engineering. We have defined a fairly comprehensive semantics for Sequence Diagrams, which comprises sequential and parallel constructors, loops, breaks, alternatives, synchronous and asynchronous messages. We illustrate our semantics with a scenario of a case study of a system of systems. We also discuss an analysis strategy which involves an integrated view of several diagrams.

Lecture Notes in Computer Science, 2007

The Live Sequence Charts (LSC) language is an extension of the well-known Message Sequence Charts by means to specify liveness and to distinguish possible runs of a system from protocols that all runs should adhere to. This paper studies the expressive power of the automaton-based LSC semantics [11] in terms of temporal logic. The main result is that bonded core LSCs have an exact characterisation in terms of DCSCTL, a proper sublanguage of first-order prenex CTL *. That is, for each bonded core LSC specification there is an equivalent DCSCTL formula and vice versa. Both directions of the proof are constructive.

IFIP Advances in Information and Communication Technology, 2000

The use of message sequence charts (MSCs) is popular in designing and documenting communication protocols. A recent surge of interest in MSCs has led to various algorithms for their automatic analysis, e.g., finding race conditions. In this paper we adopt a causality based temporal logic to specify properties of MSCs. This alleviates some problems that arise when specifying properties of MSCs using the traditional interleaving-based linear temporal logic: systems of MSCs are not necessarily finite state systems, leading to undecidability of LTL model checking. Even when dealing with finite state MSC systems, the set of linearizations can easily generate an exponential state space explosion. We provide an efficient model checking algorithm for systems of MSCs. Our construction models the FIFO MSC systems using a restricted version of w-automata with two successor relations. We implemented a model checking environment for MSCs as an extension to the SPIN model checking system.

2000

MSC · is a generalization of hierarchical message sequence charts (hMSCs) having the capability to specify preemptive features such as watchdogs, generalized coregion and forbidden scenarios. In this paper, we shall illustrate the applications of MSC · to the specification of reactive systems through the example of an Automatic Teller Machine (ATM). We shall bring out the additional advantage of the possibility of integrating asynchronous interface requirements in the realization of prototypes from MSC · specifications.

Lecture Notes in Computer Science, 1997

We describe diagram-based formal methods for verifying temporal properties of finite-and infinite-state reactive systems. These methods, which share a common background and tools, differ in the way they use automatic procedures within an interactive setting based on deduction. They can be used to produce a static proof object, or to perform incremental analysis of systems and specifications. terexample, giving a semi-automatic proof procedure.