This article proposes two approaches to tool-supported automatic verification of dense real-time ... more This article proposes two approaches to tool-supported automatic verification of dense real-time systems against scenario-based requirements, where a system is modeled as a network of timed automata (TAs) or as a set of driving live sequence charts (LSCs), and a requirement is specified as a separate monitored LSC chart. We make timed extensions to a kernel subset of the LSC language and define a tracebased semantics. By translating a monitored LSC chart to a behavior-equivalent observer TA and then non-intrusively composing this observer with the original TA-modeled realtime system, the problems of scenario-based verification reduce to computation tree logic (CTL) real-time model checking problems. When the real-time system is modeled as a set of driving LSC charts, we translate these driving charts and the monitored chart into a behaviorequivalent network of TAs by using a "one-TAper instance line" approach, and then reduce the problems of scenario-based verification also to CTL real-time model checking problems. We show how we exploit the expressivity of the TA formalism and the CTL query language This work has been supported by the ICT competence center CISS (Center for Embedded Software Systems) and the advanced technology platform DaNES (Danish Network for intelligent Embedded Systems).
We begin by summarizing the services to be provided by the protocol and then describe the overall... more We begin by summarizing the services to be provided by the protocol and then describe the overall ideas of how t h e s e a r e t o b e p r o vided.
Introduction. The goal of testing is to gain condence in a physical computer based system by mean... more Introduction. The goal of testing is to gain condence in a physical computer based system by means of executing it. More than one third of typical project resources is spent on testing and still it remains ad-hoc, based on heuristics, and error-prone. Moreover, it is estimated that 99% of processors produced today are targeted for embedded applications. Real-time and embedded systems require a special attention to timing where the moment of input and output event appearance is as important as the event itself. Therefore a special attention must be paid to timing during testing. The goal of conformance testing is to check whether the behavior of the system under test (IUT) is correct (conforming) to that of its specication. We follow a model driven approach where a formal model (or specication) denes the required (real-time) observable behavior of the IUT, and from this we automatically derive and execute real-time test cases to determine whether the IUT is conforming. A new approach...
We propose to combine timed automata and linear hybrid automata model checkers for formal testing... more We propose to combine timed automata and linear hybrid automata model checkers for formal testing and monitoring of embedded systems with a hybrid behavior, i.e., where the correctness of the system depends on discrete as well as continuous dynamics. System level testing is considered, where requirements capture abstract behavior and often include non-determinism due to parallelism, internal counters and subtle state of physical materials. The goal is achieved by integrating the tools Uppaal [2] and PHAVer [3], where the discrete and hard real-time aspects are driven and checked by Uppaal TRON and strict inclusion of dynamical trajectories is verified by PHAVer. We present the framework, the underlying theory, and our techniques for integrating the tools. We demonstrate the applicability on an industrial case study.
Proceedings of the 5th ACM international conference on Embedded software - EMSOFT '05, 2005
UPPAAL-TRON is a new tool for model based online black-box conformance testing of real-time embed... more UPPAAL-TRON is a new tool for model based online black-box conformance testing of real-time embedded systems specified as timed automata. In this paper we present our experiences in applying our tool and technique on an industrial case study. We conclude that the tool and technique is applicable to practical systems, and that it has promising error detection potential and execution performance.
In this paper we show how to automatically generate test sequences that are aimed at testing the ... more In this paper we show how to automatically generate test sequences that are aimed at testing the interconnections of embedded and communicating systems. Our proposal is based on the connectivity fault model proposed by , where faults may occur in the interface between the software and its environment rather than in the software implementation. We show that the test generation task can be carried out by solving a reachability problem in a system consisting essentially of a specification of the communicating system and its fault model. Our technique can be applied using most off-the-shelf model-checking tools to synthesize minimal test sequences, and we demonstrate it using the UppAal realtime model-checker. We present two algorithms for generating minimal tests: one for single faults and one for multiple faults. Moreover, we demonstrate how to exploit the unique time-and cost-planning-facilities of UppAal to derive cheapest possible test suites for restricted types of timed systems.
ABSTRACT Model-based testing is a promising technique for improving the quality of testing by aut... more ABSTRACT Model-based testing is a promising technique for improving the quality of testing by automatically generating an efficient set of provably valid test cases from a system model. Testing embedded real-time systems is challenging because it must deal with timing, concurrency, processing and computation of complex mixed discrete and continuous signals, and limited observation and control. Whilst several techniques and tools have been proposed, few deals systematically with models capturing the indeterminacy resulting from concurrency, timing and limited observability and controllability. This paper proposes a number of model-based test generation principles and techniques that aim at efficient testing of timed systems under uncertainty.
Real-Time Layered Video Compression Using SIMD Computation
Lecture Notes in Computer Science, 1999
ABSTRACT We present the design and implementation of a high performance software layered video co... more ABSTRACT We present the design and implementation of a high performance software layered video codec, designed for deployment in bandwidth heterogeneous networks. The codec facilitates layered spatial and SNR (signal-to-noise ratio) coding for bit-rate adaption to a wide range of receiver capabilities. The codec uses a wavelet subband decomposition for spatial layering and a discrete cosine transform combined with repeated quantization for SNR layering. Through the use of the Visual Instruction Set on SUN's UltraSPARC platform we demonstrate how SIMD parallel image processing enables layered real-time software encoding and decoding. The codec partitions our 384 × 320 × 24-bit test video stream into 21 layers at a speed of 39 frames per second and reconstructed at 28 frames per second. The Visual Instruction Set accelerated encoder stages are about 3-4 times as fast as an optimized C version. We find that this speedup is well worth the extra implementation effort.
Verifying Real-Time Systems against Scenario-Based Requirements
Lecture Notes in Computer Science, 2009
We propose an approach to automatic verification of real-time systems against scenario-based requ... more We propose an approach to automatic verification of real-time systems against scenario-based requirements. A real-time system is modeled as a network of Timed Automata (TA), and a scenario-based requirement is specified as a Live Sequence Chart (LSC). We define a trace-based semantics for a kernel subset of the LSC language. By equivalently translating an LSC chart into an observer TA
Scenario-based analysis and synthesis of real-time systems using uppaal
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), 2010
ABSTRACT We propose an automated, tool-supported approach to scenario-based analysis and synthesi... more ABSTRACT We propose an automated, tool-supported approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-object behaviors of a system are modeled as a set of live sequence charts (LSCs), and the scenario-based user requirement is specified as a separate LSC. By translating the set of LSC charts into a behavior-equivalent network of timed automata (TA), we reduce the problems of model consistency checking and property verification to classical CTL real-time model checking problems, and reduce the problem of centralized synthesis for open systems to a timed game solving problem. We implement a prototype LSC-to-TA translator, which can be linked to existing real-time model checker UPPAAL and timed game solver UPPAAL-TIGA. Preliminary experiments on a number of examples show that it is a viable approach.
Proceedings First International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC '98), 1998
We present a coordination language and its semantics for specification and implementation of obje... more We present a coordination language and its semantics for specification and implementation of object-oriented realtime systems. Real-time systems operate under real-time constraints, and our language supports expression thereof. In our language, a system is modeled by two separate but complementary descriptions: A collection of objects define the system's structure and functional behavior, and a set of interaction constraints define how these objects may interact. Our language thereby supports development of realtime systems by enabling objects build in isolation or reused from other systems to be composed via interaction constraints. We use the Actor model to describe objects and the concept of real-time synchronizers to describe interaction constraints.
Experiments with Video Communication on ATM-networks
ABSTRACT This report presents the results of a set of performance measurements related to communi... more ABSTRACT This report presents the results of a set of performance measurements related to communication of digital video on ATM-networks. High qual-ity video produces large amounts data which m u s t b e c o m m unicated and processed in real-time. Satisfaction of this requirements require knowledge about the available system resources and the nature of the load that are put on these. We therefore benchmark our testbed consisting of a local area ATM network and a local area Ethernet to investigate the available resources and compressed video's use of bandwidth and cpu resources. We examine three protocol/network combinations with respect to. through-put, latency and jitter: AAL-5 on an ATM-network, UDP on ATM, and UDP on Ethernet. The measurements show t h a t AAL-5 gives the high-est throughput, lowest latency, and lowest jitter. We nd that a loaded Ethernet produces very high jitter values, that require special attention in a multi-media system. We conclude that AAL-5 is the better choice of the three protocols for transmission of high bandwidth real-time sensitive traac. We analyse and compare two video compression techniques, MPEG-1 and MPEG-2. We record and compress a test video which w e then analyze for its usage of bandwidth and the cpu-time required compress and decompress it. Our analysis indicates that MPEG-2 gives a better quality/bandwidth ratio than MPEG-1, and also that the variation in bandwidth and cpu usage is smaller, and thus is easier to manage. For transmission of live video, the combination of AAL-5 and MPEG-2 gives the best result: The lowest end-to-end delay and the lowest variation in end-to-end delay. Our new insight in the real-time performance characteristics of communi-cation protocols for video communication and of compressed video have given us a solid foundation for designing and constructing multi-media applications and support systems.
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Papers by Brian Nielsen