Academia.eduAcademia.edu

Outline

Simple generation of threshold for images binarization on FPGA

2015, Revista Ingenieria E Investigacion

https://doi.org/10.15446/ING.INVESTIG.V35N3.51750

Abstract

The methodologies presented in scientific literature to calculate the threshold of an image binarization process do not present good results for all types of images. Additionally, the hardware implementations do not consider the FPGA resources that are used in other processing phases. Thus, the method proposed in this work aims to present good results in the binarization process with under-resourced area of FPGA. Therefore, this paper proposes the FPGA implementation of a threshold algorithm used in the process of image binarization by simple mathematical calculations. The implementation only needs one image iteration and its processing time depends on the size of the image. The threshold values of different images obtained through the FPGA implementation are compared with those obtained by Otsu's method, showing the differences and the visual results of binarization using both methods. The hardware implementation of the algorithm is performed by a model-based design supported by the MATLAB ® /Simulink ® and Xilinx System Generator ® tools. The results of the implementation proposal are presented in terms of resource consumption and maximum operating frequency in a Spartan-6 FPGA-based development board. The experimental results are obtained in co-simulation system and show the effectiveness of the proposed method.

References (17)

  1. Albaladejo, J., de Andrés, D., Lemus, L., & Salvi, J. (2004). Codesign Methodology for Computer Vision Applications. Microprocessors and Microsystems, (5-6), 303-316. DOI:10.1016/j.micpro.2004.-03.010
  2. Areefabegam, S. K., & Narendrakumar, T. (2014). FPGA Based Design and Implementation of Image Edge Detection Using Xilinx System Generator. International Journal of New Trends in Elec-tronics and Comunication, 2,18-21.
  3. Ashari, E., & Hornsey, R. I. (2004). FPGA Implementation of Real-Time Adaptive Image Thresholding. In J. C. Armitage, R. A. Lessard, & G. A. Lampropoulos (Eds.), (pp. 410-419). DOI:10.1117/12.566861
  4. Das, D., & Saharia, S. (2014). Implementation and Performance Evaluation of Background Subtraction Algorithms. International Journal on Computational Sciences & Applications (IJCSA), 4 (2), 49-55. DOI:10.5121/ijcsa.2014.4206
  5. Gonzalez, R. C., & Woods, R. E. (2009). (3 rd ed.). Tennessee: Prentice Hall.
  6. Gonzalez, R. C., Woods, R. E., & Eddins, S. L. (2009). (2 nd ed.). Gatesmark.
  7. Hamdaoui, F., Khalifa, A., Sakly, A., & Mtibaa, A. (2013). Real Time Implementation of Medical Images Segmentation Based on PSO. In 2013 International Conference on Control, Decision and Infor-mation Technologies (CoDIT) (pp. 36-42). Hammamet, Tunisia: IEEE. DOI:10.1109/ CoDIT.2013.6689516
  8. Humayun, J., Malik, A. S., & Kamel, N. (2011). Multilevel Thresholding for Segmentation of Pigmented Skin Lesions. In 2011 IEEE Interna-tional Conference on Imaging Systems and Techniques (pp. 310-314). IEEE. DOI:10.1109/IST.2011.5962214
  9. Jianlai, W., Chunling, Y., Min, Z., & Changhui, W. (2009). Implementation of Otsu's Thresholding Process Based on FPGA. In (Vol. 1, pp. 479-483). IEEE. DOI:10.1109/ICIEA.2009.5138252
  10. LLiang, Z., Haili, W., Tao, D., & Xiaomei, H. E. (2014). Improving Inte-grality of Detected Moving Objects Based on Image Matting. Chinese Journal of Electronics, 23(4), 742-746.
  11. Otsu, N. (1979). A Threshold Selection Method from Gray- Level His-tograms. IEEE Transactions on Systems, Man, and Cybernetics, 9(1), 62-66. DOI:10.1109/TSMC.1979.4310076
  12. Pushpa, D., & Sheshadri, H. S. (2014). Computationally Efficient Al-gorithm for Detecting Moving Objects with Moving Background. International Journal on Recent and Innovation Trends in Com-puting and Communication (IJRITCC), 2(11), 3605-3610.
  13. Ramos-Arreguín, C. A., Moya-Morales, J. C., Ramos-Arreguín, J. M., Pedraza-Ortega, J. C., Canchola-Magdaleno, S. L., & Vrgas-Soto, J. E. (2010). de Mecatrónica, Puebla, México (pp. 235-240). Pue-bla, México.Saidani, T., Dia, D., Elhamzi, W., Atri, M., & Tourki, R. (2009). Hardware Co-simulation for Video Processing Using Xilinx System Generator. , , 3-7.
  14. Saidani, T., Dia, D., Elhamzi, W., Atri, M., & Tourki, R. (2009). Hardware Co-simulation for Video Processing Using Xilinx System Generator. Proceedings of the Word Congress on Engineering, I, 3-7.
  15. Sezgin, M., & Sankur, B. (2004). Survey over Image Thresholding Techniques and Quantitative Performance Evaluation. Journal of Electronic Imaging, 13(1), 146-168. Doi:10.1117/1.1631315
  16. Tian, H., Lam, S. K., & Srikanthan, T. (2003). Implementing Otsu's Thresholding Process using Area-Time Efficient Logarithmic Ap-proximation Unit. In Proceedings of the 2003 International Sympo-sium on Circuits and Systems, 2003. ISCAS '03. (Vol. 4, pp. IV-21-IV-24). IEEE. Doi:10.1109/ISCAS.2003.1205763Xilinx. (2009). The MathWorks Design Tools and Service. Retrieved from http://www.xilinx.com
  17. Xilinx. (2009). The MathWorks Design Tools and Service. Retrieved from http://www.xilinx.com