Optimization of Real-Time Systems Timing Specifications

Proc. Software Engineering Research Forum, 1995

A new specification and refinement calculus for real time processes is set out here. Under JiT, a specification is a three-phase ``before, during and after" set of temporal assertions, connected by cross-constraints. Specifications laid out on the page have the look of an Alice-in-Wonderland wardrobe, with a door to enter, a door to peep out of, and a door to exit by, plus a bottom drawer full of undergarments. The specification style is reminiscent of Z and VDM and is intended to appeal to the same technologists. Refinements are pseudo-code containing scheduling and wait statements.

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This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and functional requirements of the upper level specification. These mechanisms are discussed in the context of ASTRAL, which is a formal specification language for real-time systems. Refinement is accomplished by mapping all of the elements of an upper level specification into lower level elements that may be split among several parallel components. In addition, actions that can occur in the upper level are mapped to actions of components operating at the lower level. This allows several types of implementation strategies to be specified in a natural way, while the price for generality (in terms of complexity) is paid only when necessary. The refinement mechanisms are first illustrated using a simple digital circuit; then, through a highly complex phone system; finally, design guidelines gleaned from these specifications are presented.

IEEE Transactions on Software Engineering, 1985

This paper examines timing constraints as features of realtime systems. It investigates the various constructs required in requirements languages to express timing constraints and considers how automatic test systems can validate systems that include timing constraints. Specifically, features needed in test languages to validate timing constraints are discussed. One of the distinguishing aspects of three tools developed at GTE Laboratories for real-time systems specification and testing is in their extensive ability to handle timing constraints. Thus, the paper highlights the timing constraint features of these tools. , until 1980, when he joined GTE Laboratories, where he has been a Prinicpal Investigator of projects on requirements-based testing, requirements analysis, and design aids for distributed real-time systems. He is currently Department Manager, Software Engineering Environments, at GTE Laboratories. His publications are in the areas of graph theory, analysis of algorithms, operations research, software requirements engineering, and real-time system design. His present research interests include sofware engineering environments and tools, and aids for engineering performance into the design of real-time systems.

Journal of Systems and Software, 2009

Real-time embedded systems are often designed with different types of urgencies such as delayable or eager, that are modeled by several urgency variants of the timed automata model. However, most model checkers do not support such urgency semantics, except for the IF toolset that model checks timed automata with urgency against observers. This work proposes an Urgent Timed Automata (UTA) model with zone-based urgency semantics that gives the same model checking results as absolute urgency semantics of other existing urgency variants of the timed automata model, including timed automata with deadlines and timed automata with urgent transitions. A necessary and sufficient condition, called complete urgency, is formulated and proved for avoiding zone partitioning so that the system state graphs are simpler and model checking is faster. A novel zone capping method is proposed that is time-reactive, preserves complete urgency, satisfies all deadlines, and does not need zone partitioning. The proposed verification methods were implemented in the SGM CTL model checker and applied to real-time and embedded systems. Several experiments, comparing the state space sizes produced by SGM with that by the IF toolset, show that SGM produces much smaller state-spaces.

Scientia Iranica, 2014

Performability is an important parameter in safety-critical real-time systems. This parameter is defined as the joint consideration of two other important parameters, i.e., reliability and performance. This paper proposes a schedulability condition, which guarantees a desired level of performability in various working conditions, for real-time systems. The basic idea underlining this condition is to select a subset of schedulable tasks and manage their slack times to satisfy a desired performability level. The proposed condition is evaluated on a hard real-time system that employs the Rate-Monotonic (RM) scheduling algorithm and uses the re-execution mechanism to improve the reliability. Evaluation results reveal that by employing the condition, the level of performability of the system is always greater than the desired performability. In addition, it yields on average 1% improvement in the system performability in comparison with traditional schedulability conditions, while the ac...

IEEE Transactions on Software Engineering, 1982

This paper examines timing constraints as features of realtime systems. It investigates the various constructs required in requirements languages to express timing constraints and considers how automatic test systems can validate systems that include timing constraints. Specifically, features needed in test languages to validate timing constraints are discussed. One of the distinguishing aspects of three tools developed at GTE Laboratories for real-time systems specification and testing is in their extensive ability to handle timing constraints. Thus, the paper highlights the timing constraint features of these tools.

We present a method that makes use of the theorem prover PVS to specify, develop and verify real-time software components for embedded control systems software with periodic tasks. The method is based on an intuitive discrete time \Clocks" theory by Dutertre and Stavridou that models periodic timed trajectories representing data∞ows. We illustrate the method by considering a Held For operator on data∞ows that is used to specify real-time requirements. Recursive functions using the PVS TABLE construct are used to model both the system requirements and the design. A software component is designed to imple- ment the Held For operator and then verifled in PVS. This pre-verifled component is then used to guide design of more complex components and decompose their design veriflcation into simple inductive proofs. Finally, we demonstrate how the rewriting and propositional simpliflcation capabilities of PVS can be used to reflne a component based implementa- tion to improve the perfor...

Innovations in Systems and Software Engineering, 2009

The aim of this article is to explore the problem of verification of preemptible real-time systems, i.e. systems composed of tasks which can be suspended and resumed by an on-line scheduler. The first contribution of the article is to show that this problem is unfortunately undecidable. To overcome this negative result, we restrict the real-time tasks to be periodic and the implementation to be functionally deterministic, meaning that the preemptions do not affect the functional behaviour and preserve some temporal properties satisfied by the specification. We prove that the verification problem of functional determinism is decidable. This outlines a verification strategy: (1) prove that the scheduled real-time system is deterministic, (2) consider a deterministic non preemptible behaviour which is functionally equivalent to the executions and (3) verify the properties on this behaviour.