Papers by Philippe Soulard
MARTE Modeling, Model Transformations and their Usages, 2013
This paper presents a new methodology to develop SoC/SoPC applications. This methodology is based... more This paper presents a new methodology to develop SoC/SoPC applications. This methodology is based on UML and MDD and capitalizes the achievements of "Electronic System Level" community by taking into account the new MARTE profile dedicated to real-time embedded systems. In the MOPCOM SoC/SoPC research project, a tooling has been developed to support this SoC/SoPC methodology, the MARTE profile, HDL code generation and documentation generation. A Cognitive Radio demonstrator is presented to illustrate the methodology and the tooling.
Design Automation for Embedded Systems, 2012
Dynamic Partial Reconfiguration (DPR) has been introduced in recent years as a method to increase... more Dynamic Partial Reconfiguration (DPR) has been introduced in recent years as a method to increase the flexibility of FPGA designs. However, using DPR for building complex systems remains a daunting task. Recently, approaches based on Model-Driven Engineering (MDE) and UML MARTE standard have emerged which aim to simplify the design of complex SoCs, and in some cases, DPR systems. Nevertheless, many of these approaches lacked a standard intermediate representation to pass from high-levels of descriptions to executable models. However, with the recent standardization of the IP-XACT specification, there is an increasing interest to use it in MDE methodologies to ease system integration and to enable design flow automation. In this paper we propose an MARTE/MDE approach which exploits the capabilities of IP-XACT to model and automatically generate DPR SoC designs. We present the MARTE modeling concepts and how these models are mapped to IP-XACT objects; the emphasis is given to the generation of IP cores that can be used in the Xilinx EDK (Embedded Design Kit) environment, since we aim to develop a complete flow around their Dynamic Partial Reconfiguration design flow. Finally, we present a case study integrating the presented concepts, showing the benefits in design efforts compared with a purely VHDL approach and using solely EDK. Experimental results show a reduction of
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), 2010
In this paper we propose a design methodology to explore partial and dynamic reconfiguration of m... more In this paper we propose a design methodology to explore partial and dynamic reconfiguration of modern FPGAs. We improve an UML based co-design methodology to allow dynamic properties in embedded systems. Our approach targets MPSoPC (Multiprocessor System on Programmable Chip) which allows area optimization through partial reconfiguration without performance penalty. In our case area reduction is achieved by reconfiguring co-processors connected to embedded processors. Most of the system is automatically generated by means of MDE techniques. Our modeling approach allows designers to target dynamic reconfiguration without being expert of modern FPGAs as many implementation details are hidden during the modeling step. Such a methodology allows design time speedup and a significant reduction of the gap between hardware and software modeling. In order to validate our approach, an object tracking application has been implemented on a reconfigurable system composed of 4 embedded processors and 3 co-processors. Dynamic reconfiguration has been performed for one co-processor which dynamically implements 3 different computations.
IP reuse in an MDA MPSoPC co-design approach
2009 International Conference on Microelectronics - ICM, 2009
... We propose an approach where integrated simulation and VHDL code generation are in a singleen... more ... We propose an approach where integrated simulation and VHDL code generation are in a singleenvironment, and we add platform modeling ... It is also important to remark that our approach allows easy modeling of the system using only standards UML/MARTE elements. III. ...
The Model Driven Architecture is a promising approach aiming to fill the productivity gap due to ... more The Model Driven Architecture is a promising approach aiming to fill the productivity gap due to the increasing technology and time to market pressure. In the field of real time embedded systems, this approach requires the use of well-adapted formalisms in a reliable process that guarantees the quality of the products. MARTE, the new standardized UML profile, provides those formalisms that are applied in the process defined in the MoPCoM SoC/SoPC research program, aiming to develop SoC and SoPC applications. In this paper, we discuss the main phases of this process and their use of MARTE.
Mathematical and Computer Modelling, 2011
This paper presents the MOPCOM design methodology, developed to enable the efficient design of re... more This paper presents the MOPCOM design methodology, developed to enable the efficient design of real time embedded systems, in particular radio (such as software defined radio) communication and video processing equipment. Based on UML and the model driven architecture approach, it could be advantageously applied for the design of a system on a chip or a system on a programmable chip. The MOPCOM methodology defines a set of rules for building UML models for embedded systems, from which Hardware Description Language code is automatically generated by means of a set of model transformations. The MARTE profile is used to describe real time properties and to perform platform modeling. A wireless communication demonstrator is presented to illustrate the methodology and the tooling.
… Driven Engineering for …, 2009
This paper presents a new methodology to develop SoC/SoPC applications. This methodology is based... more This paper presents a new methodology to develop SoC/SoPC applications. This methodology is based on UML and MDD and capitalizes the achievements of "Electronic System Level" community by taking into account the new MARTE profile dedicated to real-time embedded systems. In the MOPCOM SoC/SoPC research project, a tooling has been developed to support this SoC/SoPC methodology, the MARTE profile, HDL code generation and documentation generation. A Cognitive Radio demonstrator is presented to illustrate the methodology and the tooling.
… Driven Engineering for …, 2009
This paper presents a new methodology to develop SoC/SoPC applications. This methodology is based... more This paper presents a new methodology to develop SoC/SoPC applications. This methodology is based on UML and MDD and capitalizes the achievements of "Electronic System Level" community by taking into account the new MARTE profile dedicated to real-time embedded systems. In the MOPCOM SoC/SoPC research project, a tooling has been developed to support this SoC/SoPC methodology, the MARTE profile, HDL code generation and documentation generation. A Cognitive Radio demonstrator is presented to illustrate the methodology and the tooling.
The Model Driven Architecture is a promising approach aiming to fill the productivity gap due to ... more The Model Driven Architecture is a promising approach aiming to fill the productivity gap due to the increasing technology and time to market pressure. In the field of real time embedded systems, this approach requires the use of well-adapted formalisms in a reliable process that guarantees the quality of the products. MARTE, the new standardized UML profile, provides those formalisms that are applied in the process defined in the MoPCoM SoC/SoPC research program, aiming to develop SoC and SoPC applications. In this paper, we discuss the main phases of this process and their use of MARTE.
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Papers by Philippe Soulard