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Fig. 1. Proposed Temperature Sensor In this section, simulation result of the proposed op amp is described. The presented Op amp has been designed in 90nm CMOS process with 500fF load capacitor and simulated in cadence analog and digital design system.

Figure 1 Proposed Temperature Sensor In this section, simulation result of the proposed op amp is described. The presented Op amp has been designed in 90nm CMOS process with 500fF load capacitor and simulated in cadence analog and digital design system.

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Fig. 3. AC Response of Op amp Fig. 2. Transisent Analysis of Proposed Op amp
Fig. 3. AC Response of Op amp Fig. 2. Transisent Analysis of Proposed Op amp
The overall resultant power dissipation of the proposed op amp is 21 nW.
The overall resultant power dissipation of the proposed op amp is 21 nW.
Fig. 4. AC Response at different temperature -50°C to +50 °C
Fig. 4. AC Response at different temperature -50°C to +50 °C
Fig. 5. Monte Carlo simulation result for 10mV variation in threshold voltage in Gain
Fig. 5. Monte Carlo simulation result for 10mV variation in threshold voltage in Gain
Fig. 6. Monte Carlo simulation result for 10mV variation in threshold voltage in Phase margin
Fig. 6. Monte Carlo simulation result for 10mV variation in threshold voltage in Phase margin
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Vlsi DesignMemory StudiesCMOS Integrated Circuit Design
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