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Figure 1. MFT Design methodology.

Figure 1 MFT Design methodology.

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In the third step, the winding and insulation characteristics are defined. This includes the number of turns of the primary and secondary (Np and N5), the area of the primary and secondary conductor (Awp and Aws), rated primary current (I), the minimum distance between conductors (djn;), required insulation voltage (Uj,,;), insulation dielectric strength Eins) and safety margin (v). The insulation distance between the windings (Dys) is deter- mined, as well as the minimum insulation distance of the primary (D,) and secondary (Ds) conductors. The conductors usually used in transformer construction are flat conductors, Litz wire, and solid conductors. For this research, the conductor used is solid round copper due to its good performance in MFTs. The number of turns of the primary is calculated with Equation (1). The rated current and current density define the conductor size us- The core characteristics, such as material and geometry, are defined in the second step. The nanocrystalline material integrates high saturation flux density, high permeabil- ity, and low operating losses to the prototype and achieves good mid-frequency perfor- mance [12,15, of nanocrysta 6]. The toroidal geometry represents lower flux dispersion, so a combination line material and toroidal geometry is the selected proposal in this research. The toroidal geometry is presented in Figure 2. The core dimensions considered in the design are ou effective core the nominal ter diameter (OD), inner diameter (ID), core length (HT), window area (W,), cross-section (A,), and the area product (A,). The design process considers Bac) and maximum (Bray) flux density, where Binay is the core saturation value. The maximum value of flux density is presented when the prototype operates with multilevel feed, so it is the value considered as nominal flux density, thus covering the operation wit h multilevel feed, assuring the correct operation with 2L feed.
In the third step, the winding and insulation characteristics are defined. This includes the number of turns of the primary and secondary (Np and N5), the area of the primary and secondary conductor (Awp and Aws), rated primary current (I), the minimum distance between conductors (djn;), required insulation voltage (Uj,,;), insulation dielectric strength Eins) and safety margin (v). The insulation distance between the windings (Dys) is deter- mined, as well as the minimum insulation distance of the primary (D,) and secondary (Ds) conductors. The conductors usually used in transformer construction are flat conductors, Litz wire, and solid conductors. For this research, the conductor used is solid round copper due to its good performance in MFTs. The number of turns of the primary is calculated with Equation (1). The rated current and current density define the conductor size us- The core characteristics, such as material and geometry, are defined in the second step. The nanocrystalline material integrates high saturation flux density, high permeabil- ity, and low operating losses to the prototype and achieves good mid-frequency perfor- mance [12,15, of nanocrysta 6]. The toroidal geometry represents lower flux dispersion, so a combination line material and toroidal geometry is the selected proposal in this research. The toroidal geometry is presented in Figure 2. The core dimensions considered in the design are ou effective core the nominal ter diameter (OD), inner diameter (ID), core length (HT), window area (W,), cross-section (A,), and the area product (A,). The design process considers Bac) and maximum (Bray) flux density, where Binay is the core saturation value. The maximum value of flux density is presented when the prototype operates with multilevel feed, so it is the value considered as nominal flux density, thus covering the operation wit h multilevel feed, assuring the correct operation with 2L feed.
The FBDC topology is an isolated DC-DC unidirectional topology composed of three stages, the full-bridge (FB), the MFT, and the rectifier-bridge (RB). This topology, as with other multilevel, feeds the transformer with 2L and 3L signals at different points of opera- tion; therefore, the transformer operates with different THD values using the same number of semiconductors. The FBDC diagram is shown in Figure 3. The modulation generates 2L and 3L signals in Figure 4 to feed the transformer. Figure 4a
The FBDC topology is an isolated DC-DC unidirectional topology composed of three stages, the full-bridge (FB), the MFT, and the rectifier-bridge (RB). This topology, as with other multilevel, feeds the transformer with 2L and 3L signals at different points of opera- tion; therefore, the transformer operates with different THD values using the same number of semiconductors. The FBDC diagram is shown in Figure 3. The modulation generates 2L and 3L signals in Figure 4 to feed the transformer. Figure 4a
Figure 4. Modulation signals: (a) 2L, (b) 3L. phase with S4 and S3. All modulation signals operate at nominal frequency and 50% duty cycle. The modulation in the FBDC to generate 2L and 3L show its simplicity, compared to other multilevel topologies with the same THD value [19,22-—24,27,28].
Figure 4. Modulation signals: (a) 2L, (b) 3L. phase with S4 and S3. All modulation signals operate at nominal frequency and 50% duty cycle. The modulation in the FBDC to generate 2L and 3L show its simplicity, compared to other multilevel topologies with the same THD value [19,22-—24,27,28].
Table 1. MFT’s Parameters. 3.1. MFT Analysis under Power Supply with Different THD
Table 1. MFT’s Parameters. 3.1. MFT Analysis under Power Supply with Different THD
Figure 5. Topology: (a) MFT efficiency test and (b) FBDC. The linear model of the transformer was first validated with 2L and 3L power supply and later within the FBDC topology. The test topologies are shown in Figure 5 and were implemented in MATLAB-Simulink. The MFT performance and efficiency were determined in Figure 5a topology. The transformer is subjected to 2L and 3L fed, showing the power is the same for both operating conditions. The voltage THD for 2L presents a value of 48.4%, and the current takes 38%.
Figure 5. Topology: (a) MFT efficiency test and (b) FBDC. The linear model of the transformer was first validated with 2L and 3L power supply and later within the FBDC topology. The test topologies are shown in Figure 5 and were implemented in MATLAB-Simulink. The MFT performance and efficiency were determined in Figure 5a topology. The transformer is subjected to 2L and 3L fed, showing the power is the same for both operating conditions. The voltage THD for 2L presents a value of 48.4%, and the current takes 38%.
On the other hand, for 3L, the voltage THD shows 29% and the current 19.6%. Thus, the effect of the modulation on the THD is evident, depicting variations of 19% in voltage and current. The efficiency of the transformer is 99.5% for both cases, validating the high efficiency of operating with different THD in the power supply. The efficiency calculation is presented in Table 2 and considers Equation (9). Figure 6 shows the waveforms for the 2L and 3L tests.
On the other hand, for 3L, the voltage THD shows 29% and the current 19.6%. Thus, the effect of the modulation on the THD is evident, depicting variations of 19% in voltage and current. The efficiency of the transformer is 99.5% for both cases, validating the high efficiency of operating with different THD in the power supply. The efficiency calculation is presented in Table 2 and considers Equation (9). Figure 6 shows the waveforms for the 2L and 3L tests.
Figure 7. DC signals are measured in (a) 2-Level and (b) 3-Level converters.
Figure 7. DC signals are measured in (a) 2-Level and (b) 3-Level converters.
Figure 8. Converter efficiency from simulation measurements.
Figure 8. Converter efficiency from simulation measurements.
Figure 9. Loss percentages in (a) 2L and (b) 3L converters.
Figure 9. Loss percentages in (a) 2L and (b) 3L converters.
Table 3. MFT’s parameters. The active implemented stage consists of four silicon carbide power MOSFETs (C2M0025120D); the prototype described in Table 3 corresponds to the isolation stage, and the rectification stage consists of four power diodes (C4D20120D). The measuring equipment is a Tektronix-TBS1104 oscilloscope, voltage probes with x 100 attenuation, and current clamps. AC current measurements use Fluke 80 i 1000 s clamps, and Hantek-CC-65 clamps are used for DC measurements. The modulation signals are generated with a DSP PICCOLO-S28335.
Table 3. MFT’s parameters. The active implemented stage consists of four silicon carbide power MOSFETs (C2M0025120D); the prototype described in Table 3 corresponds to the isolation stage, and the rectification stage consists of four power diodes (C4D20120D). The measuring equipment is a Tektronix-TBS1104 oscilloscope, voltage probes with x 100 attenuation, and current clamps. AC current measurements use Fluke 80 i 1000 s clamps, and Hantek-CC-65 clamps are used for DC measurements. The modulation signals are generated with a DSP PICCOLO-S28335.
The prototype tests follow the sequence of the simulation. Therefore, the first as- sembled circuit corresponds to Figure 5a, and MFT efficiency operating with 2L and 3L power supply are determined. In Figure 10, the AC measurements of the MFT prototype are shown. The prototype efficiency is determined by applying Equation (9) and the oscilloscope measurements; for 2L, it reaches 99.55%, and for 3L, it reflects a value of 99.57%. The results show the high efficiency and performance of the transformer and confirm that the design is adequate since the efficiency remains at a high value for 2L and 3L power supply.
The prototype tests follow the sequence of the simulation. Therefore, the first as- sembled circuit corresponds to Figure 5a, and MFT efficiency operating with 2L and 3L power supply are determined. In Figure 10, the AC measurements of the MFT prototype are shown. The prototype efficiency is determined by applying Equation (9) and the oscilloscope measurements; for 2L, it reaches 99.55%, and for 3L, it reflects a value of 99.57%. The results show the high efficiency and performance of the transformer and confirm that the design is adequate since the efficiency remains at a high value for 2L and 3L power supply.
Figure 11. Laboratory prototype of FBDC topology: (a) DC variable source 0-120 V, (b) Full-bridge, (c) MFT, (d) Rectifier bridge, (e) Load, (f) Oscilloscope, and (g) DSP.
Figure 11. Laboratory prototype of FBDC topology: (a) DC variable source 0-120 V, (b) Full-bridge, (c) MFT, (d) Rectifier bridge, (e) Load, (f) Oscilloscope, and (g) DSP.
Figure 12. DC voltage and current signals from converter at full load: (a) 2L and (b) 3L.
Figure 12. DC voltage and current signals from converter at full load: (a) 2L and (b) 3L.
Table 4. Isolated DC-DC converters with high efficiency.
Table 4. Isolated DC-DC converters with high efficiency.
Figure 14. Percentage of losses in the converter of (a) 2L and (b) 3L. Figure 13. Efficiencies for 2L and 3L converters.
Figure 14. Percentage of losses in the converter of (a) 2L and (b) 3L. Figure 13. Efficiencies for 2L and 3L converters.
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