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Figure 7.4: Priority values before changes are set. of the modules might just be swapped. If this is not possible, the priority values o the modules and of their preceding modules are adjusted automatically, so that as ¢ result, the newly prioritized module will be ordered logically before the other one. The adaptation of the priority values is emphasized by Figure 7.5.

Figure 7 4: Priority values before changes are set. of the modules might just be swapped. If this is not possible, the priority values o the modules and of their preceding modules are adjusted automatically, so that as ¢ result, the newly prioritized module will be ordered logically before the other one. The adaptation of the priority values is emphasized by Figure 7.5.

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Figure 3.1: A snapshot of an SMT-RAT composition being an SMT solver for NRA. SMT-RAT is a C++ of methods for so ibrary consisting of a collection of S refer to as modules. These modules can be combined to extend the supported logics of an existing SMT solver or (2) an SMT so ver for NRA/NIA (see Figure 3.1). T to be a testing environment for the development of S of further method s tackling NRA/NIA. Here, the deve T compliant implementations ving non-linear real and integer arithmetic NRA/NIA formu (1) a theory solver in order tc as, we by NRA/NIA (see Figure 3.2) he latter is especially in oper only needs to imp solver in order to solve the Boolean skeleton of the given formula. Instead, $ provides this and more features, such as lemma exchange, which will be explained in following (taken from the system architecture description of our SAT’15 submission). tendec T compliant implementations ement the given interfaces of an SMT-RAT module and does not need to care about parsing input files, transforming formulas to conjunctive normal form or embedding a SAT T-RAT
Figure 3.1: A snapshot of an SMT-RAT composition being an SMT solver for NRA. SMT-RAT is a C++ of methods for so ibrary consisting of a collection of S refer to as modules. These modules can be combined to extend the supported logics of an existing SMT solver or (2) an SMT so ver for NRA/NIA (see Figure 3.1). T to be a testing environment for the development of S of further method s tackling NRA/NIA. Here, the deve T compliant implementations ving non-linear real and integer arithmetic NRA/NIA formu (1) a theory solver in order tc as, we by NRA/NIA (see Figure 3.2) he latter is especially in oper only needs to imp solver in order to solve the Boolean skeleton of the given formula. Instead, $ provides this and more features, such as lemma exchange, which will be explained in following (taken from the system architecture description of our SAT’15 submission). tendec T compliant implementations ement the given interfaces of an SMT-RAT module and does not need to care about parsing input files, transforming formulas to conjunctive normal form or embedding a SAT T-RAT
Figure 3.2: A snapshot of an SMT-RAT composition being a theory solver embedded in an SMT solver.
Figure 3.2: A snapshot of an SMT-RAT composition being a theory solver embedded in an SMT solver.
Figure 7.1: The main window of the SMT-XRAT application in its initial state The main window structure of the SMT-XRAT application can be seen in Figure 7.1. It principally consists only of one large pane, which is called strategy graph pane. This pane embodies the workspace of the user and visualizes the composition of SMT-RAT modules, which are currently modeled. Only a comparatively small area is occupied by a compact menu bar, which offers for instance the exportation of a strategy graph into SMT-RAT.
Figure 7.1: The main window of the SMT-XRAT application in its initial state The main window structure of the SMT-XRAT application can be seen in Figure 7.1. It principally consists only of one large pane, which is called strategy graph pane. This pane embodies the workspace of the user and visualizes the composition of SMT-RAT modules, which are currently modeled. Only a comparatively small area is occupied by a compact menu bar, which offers for instance the exportation of a strategy graph into SMT-RAT.
Figure 7.2: The small rectangles alongside the edges reveal the hidden condition of a backend.
Figure 7.2: The small rectangles alongside the edges reveal the hidden condition of a backend.
consists of the union of logical operators and propositions. S € N is the start symbol of the production rules denoted by the set R, which covers the following: with the non-terminal symbols T being a term, B being a binary operator, C’ being a conjunction, D being a disjunction and P being a proposition. a eS a, ie a aaa The terminal symbols ‘7’, ‘4’, ‘@’, ‘>’, ‘A’ and ‘V’ represent their related logica. operators, which, in the context of conditions, are negation, equivalence, exclusive or implication, conjunction and disjunction respectively. Their semantics is defined as usual. The terminal symbols ‘( and ‘)’ are used, in case several different types o! logical operators are utilized within one term. They point out the precedences of the operators in the same way as it is known from mathematical contexts. For example. for the term p; V p2 A pg it is unknown, which of the logical operators has the higher precedence. Writing the same term with parenthesis as p; V (pe A p3) clarifies, that the conjunction operator is of higher precedence.
consists of the union of logical operators and propositions. S € N is the start symbol of the production rules denoted by the set R, which covers the following: with the non-terminal symbols T being a term, B being a binary operator, C’ being a conjunction, D being a disjunction and P being a proposition. a eS a, ie a aaa The terminal symbols ‘7’, ‘4’, ‘@’, ‘>’, ‘A’ and ‘V’ represent their related logica. operators, which, in the context of conditions, are negation, equivalence, exclusive or implication, conjunction and disjunction respectively. Their semantics is defined as usual. The terminal symbols ‘( and ‘)’ are used, in case several different types o! logical operators are utilized within one term. They point out the precedences of the operators in the same way as it is known from mathematical contexts. For example. for the term p; V p2 A pg it is unknown, which of the logical operators has the higher precedence. Writing the same term with parenthesis as p; V (pe A p3) clarifies, that the conjunction operator is of higher precedence.
Figure 7.3: A wrong condition has been inputted by the user. 7.2 Specifying a strategy with the GUI
Figure 7.3: A wrong condition has been inputted by the user. 7.2 Specifying a strategy with the GUI
Figure 7.5: Intentionally changed and automatically adapted priority values. 7.2 Specifying a strategy with the GUI
Figure 7.5: Intentionally changed and automatically adapted priority values. 7.2 Specifying a strategy with the GUI
Figure 7.6: Managing SMT solvers in the SMT-RAT source code.
Figure 7.6: Managing SMT solvers in the SMT-RAT source code.
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