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Figure 29 — WAV2SES Information Display

Figure 29 — WAV2SES Information Display

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Figure 1 — Typical Voice Playback Section A basic embedded voice circuitry consists of the data storage media (preferably SD card), the decoder and the digital-to-analog converter (DAC), as shown in Figure 1. Data stored in the non-volatile memory is normally encoded (compressed) in order to save space. Audio compression techniques are almost always lossy; i.e. the reconstructed audio is not exactly the original. The loss in the quality of the reproduced signal depends on the algorithm
Figure 1 — Typical Voice Playback Section A basic embedded voice circuitry consists of the data storage media (preferably SD card), the decoder and the digital-to-analog converter (DAC), as shown in Figure 1. Data stored in the non-volatile memory is normally encoded (compressed) in order to save space. Audio compression techniques are almost always lossy; i.e. the reconstructed audio is not exactly the original. The loss in the quality of the reproduced signal depends on the algorithm
architecture [1]. The frame clock is generally 64 x bit clock; by assuming that the bit clock is at 44100 Hz, the frame clock will be at 2.8224 MHz. A synchronous data transfer at those speeds is probably beyond the capability of a low cost microcontroller and must hence be performed by a separate uP/DSP.
architecture [1]. The frame clock is generally 64 x bit clock; by assuming that the bit clock is at 44100 Hz, the frame clock will be at 2.8224 MHz. A synchronous data transfer at those speeds is probably beyond the capability of a low cost microcontroller and must hence be performed by a separate uP/DSP.
DM, in contrast to other coding techniques, uses 1-bit (2- level) quantization. The data can directly be transmitted over a communication channel without any need to shift the digital N-bit data. It is also proven to be much more tolerant to high Bit Error Rates (BER) caused by channel noise. Because of these features, it has been ideal for wired or wireless telecommunication systems.
DM, in contrast to other coding techniques, uses 1-bit (2- level) quantization. The data can directly be transmitted over a communication channel without any need to shift the digital N-bit data. It is also proven to be much more tolerant to high Bit Error Rates (BER) caused by channel noise. Because of these features, it has been ideal for wired or wireless telecommunication systems.
DM (also known as Linear DM or LDM) uses a quantization with a fixed step size. A fixed step size has two drawbacks; it makes high granular noise, inducing low Signal-to-Noise Ratio (SNR) with small input signals, where step size is too large (Figure 4); or it causes slope overload on large input signals, indicating too small step size (Figure 5). Therefore, it has very small dynamic range for optimum performance. Figure 4 — Granular Noise
DM (also known as Linear DM or LDM) uses a quantization with a fixed step size. A fixed step size has two drawbacks; it makes high granular noise, inducing low Signal-to-Noise Ratio (SNR) with small input signals, where step size is too large (Figure 4); or it causes slope overload on large input signals, indicating too small step size (Figure 5). Therefore, it has very small dynamic range for optimum performance. Figure 4 — Granular Noise
DM with a variable step size is referred as Adaptive DM (ADM). Being first proposed in 1970 [12], CVSD is a variant of ADM. In addition to point-to-point communication, CVSD is commonly used in digital voice recording/messaging and audio delay lines, as well as in tactical secure (encrypted) communications (refer to MIL-STD-188-113 at 16/32 kbps and Federal Standard 1023 at 12 kbps) [4].
DM with a variable step size is referred as Adaptive DM (ADM). Being first proposed in 1970 [12], CVSD is a variant of ADM. In addition to point-to-point communication, CVSD is commonly used in digital voice recording/messaging and audio delay lines, as well as in tactical secure (encrypted) communications (refer to MIL-STD-188-113 at 16/32 kbps and Federal Standard 1023 at 12 kbps) [4].
For this adaptation, a typical CVSD encoder adds some extra blocks before the integrator (Figure 6). The input of the integrator (consecutively the step size) is no more a constant level (“O” or “1”), but now altered by a Pulse Amplitude Modulator (PAM), which is driven by a Syllabic Filter according to an overload algorithm. The input pass-band filter rejects any non-voice component, to increase SNR of the system. It generally accepts 300 Hz ~ 3 kHz for low data-rate implementations. At high sample rates, the band of the filter can be widened or the filter can even be omitted completely.
For this adaptation, a typical CVSD encoder adds some extra blocks before the integrator (Figure 6). The input of the integrator (consecutively the step size) is no more a constant level (“O” or “1”), but now altered by a Pulse Amplitude Modulator (PAM), which is driven by a Syllabic Filter according to an overload algorithm. The input pass-band filter rejects any non-voice component, to increase SNR of the system. It generally accepts 300 Hz ~ 3 kHz for low data-rate implementations. At high sample rates, the band of the filter can be widened or the filter can even be omitted completely.
characteristics of the overload generator, syllabic filter, PAM and the integrator must be identical to produce the correct signal. So again, the analog signal at the output of the reconstruction integrator of the decoder is theoretically the same as the signal at the reference input of the encoder comparator. The low-pass filter (LPF) at the integrator output will eliminate most of the quantizing noise, especially if the clock rate of the bit stream is an octave or more above the bandwidth of the input signal [3]. The LPF is essential for bit rates below the audible range, and generally, the lower the bit rate, the better the filter must be.
characteristics of the overload generator, syllabic filter, PAM and the integrator must be identical to produce the correct signal. So again, the analog signal at the output of the reconstruction integrator of the decoder is theoretically the same as the signal at the reference input of the encoder comparator. The low-pass filter (LPF) at the integrator output will eliminate most of the quantizing noise, especially if the clock rate of the bit stream is an octave or more above the bandwidth of the input signal [3]. The LPF is essential for bit rates below the audible range, and generally, the lower the bit rate, the better the filter must be.
The 3-bit shift register monitors the digital output for an overload, i.e. it fills with all 1’s or all 0’s. This overload condition is also called coincidence. When overload occurs, the gain or slope of the integrator (step size) is meant to be too small. The overload signal charges a LPF, called the syllabic filter, which controls the gain of the reconstruction integrator via the PAM. The higher the frequency of coincidence, the greater will be the ramp amplitude. This is basically a companding (compressing/expanding) algorithm, which significantly increases the dynamic range, compared to fixed-step size DM (Figure 8). A typical compression ratio (max/min step size) is 16:1 [5]. Figure & — Signal-to—Noise Performance
The 3-bit shift register monitors the digital output for an overload, i.e. it fills with all 1’s or all 0’s. This overload condition is also called coincidence. When overload occurs, the gain or slope of the integrator (step size) is meant to be too small. The overload signal charges a LPF, called the syllabic filter, which controls the gain of the reconstruction integrator via the PAM. The higher the frequency of coincidence, the greater will be the ramp amplitude. This is basically a companding (compressing/expanding) algorithm, which significantly increases the dynamic range, compared to fixed-step size DM (Figure 8). A typical compression ratio (max/min step size) is 16:1 [5]. Figure & — Signal-to—Noise Performance
The reconstruction integrator (also called principal integrator) is of the exponential (leaky) type to reduce the effects of digital errors via the communication channel. Figure 9 demonstrates the reconstructed output that tracks the input.
The reconstruction integrator (also called principal integrator) is of the exponential (leaky) type to reduce the effects of digital errors via the communication channel. Figure 9 demonstrates the reconstructed output that tracks the input.
Four-bit companding has proven to be most effective for clock frequencies (f,) greater than 32 kbps [4]. With 4-bit algorithm, 8 clock periods will be necessary for two coincidences, one for the raising and the second for the falling side of a sine wave. This will produce a signal with a duty cycle of 25% at the syllabic filter input. So the maximum input frequency the system can handle will be equal to f. / & for large signals. For very low input levels, the maximum bandwidth will extend up to f,/6 (Figure 10). Figure 10 — Frequency Response
Four-bit companding has proven to be most effective for clock frequencies (f,) greater than 32 kbps [4]. With 4-bit algorithm, 8 clock periods will be necessary for two coincidences, one for the raising and the second for the falling side of a sine wave. This will produce a signal with a duty cycle of 25% at the syllabic filter input. So the maximum input frequency the system can handle will be equal to f. / & for large signals. For very low input levels, the maximum bandwidth will extend up to f,/6 (Figure 10). Figure 10 — Frequency Response
Figure 11 — SNR Improvements The second measure is to insert a logarithmic amplifier between the syllabic filter and PAM. This amplifies the syllabic filter output logarithmically, enabling big step size changes for small modulation changes, which highly widens the companding capability of the system. The modulation can then be kept within a smaller range around 8.5%, by vastly increasing the usable dynamic range. The resulting SNR curves are shown in Figure 11 [7]. Curve c shows the “classic” CVSD performance, curve b with the incorporation of the double-pole integrator, whereas curve a additionally implements the logarithmic compander. That way, an SNR of 30 dB can be achieved at 32 kbps over a dynamic range of 45 dB.
Figure 11 — SNR Improvements The second measure is to insert a logarithmic amplifier between the syllabic filter and PAM. This amplifies the syllabic filter output logarithmically, enabling big step size changes for small modulation changes, which highly widens the companding capability of the system. The modulation can then be kept within a smaller range around 8.5%, by vastly increasing the usable dynamic range. The resulting SNR curves are shown in Figure 11 [7]. Curve c shows the “classic” CVSD performance, curve b with the incorporation of the double-pole integrator, whereas curve a additionally implements the logarithmic compander. That way, an SNR of 30 dB can be achieved at 32 kbps over a dynamic range of 45 dB.
The implemented decoding hardware is depicted in Figure 12. Overload generator is omitted here since it can be carried out in software. Note that the output LPF is also removed; since the clock rate is well beyond the audible range, the bandwidth of the output amplifier will sufficiently filter the inaudible 96 kHz component.
The implemented decoding hardware is depicted in Figure 12. Overload generator is omitted here since it can be carried out in software. Note that the output LPF is also removed; since the clock rate is well beyond the audible range, the bandwidth of the output amplifier will sufficiently filter the inaudible 96 kHz component.
microcontroller. If the port of the microcontroller is open- drain, a pull-up resistor (4.7kQ) will be necessary. In order to refrain from a negative supply, the op-amp is fed only from +12V; in this case +5V becomes the analog ground. MLA is hence in inverted logic. The op-amp is in voltage-follower configuration to feed the next section. The transfer equations are presented below. Note that all voltages are with respect to +5V and thus the output will be negative.
microcontroller. If the port of the microcontroller is open- drain, a pull-up resistor (4.7kQ) will be necessary. In order to refrain from a negative supply, the op-amp is fed only from +12V; in this case +5V becomes the analog ground. MLA is hence in inverted logic. The op-amp is in voltage-follower configuration to feed the next section. The transfer equations are presented below. Note that all voltages are with respect to +5V and thus the output will be negative.
The amplifier (Figure 15) ensures that the syllabic filter output remains near the desired modulation level of 8.5% throughout the practical input dynamic range. The voltage- swing at the line MLA is 5 V; hence the diode center voltage will be 0.43 V, at a forward current of 22 uA. For a dynamic range of 52 dB (400-fold change in the diode current), the diode voltage varies only about + 0.15 V, corresponding of a modulation change of about + 3%. In the encoder, the feedback resistor is set to 3.3kQ such that the peak output at maximum (11.5%) modulation will be 30% (1.5 V). The smaller feedback resistance (220Q) in the decoder decreases the peak output level to a more suitable value (0.1 V).
The amplifier (Figure 15) ensures that the syllabic filter output remains near the desired modulation level of 8.5% throughout the practical input dynamic range. The voltage- swing at the line MLA is 5 V; hence the diode center voltage will be 0.43 V, at a forward current of 22 uA. For a dynamic range of 52 dB (400-fold change in the diode current), the diode voltage varies only about + 0.15 V, corresponding of a modulation change of about + 3%. In the encoder, the feedback resistor is set to 3.3kQ such that the peak output at maximum (11.5%) modulation will be 30% (1.5 V). The smaller feedback resistance (220Q) in the decoder decreases the peak output level to a more suitable value (0.1 V).
PAM is a +1 multiplier (Figure 16). It either outputs the positive or the negative of the input level, in accordance with the Non-Return-to-Zero digital input signal (NRZ) coming from the microcontroller. BF245C is a JFET which acts as a bipolar switch. When closed, the op-amp behaves as inverting, otherwise as non-inverting. The internal on- resistance of the JFET is around 100Q, so the off-resistance is set externally (by the parallel resistor) to 10kQ such that the geometric mean equals to the input resistance (1kQ). This causes a small decrease in the modulator gain, together with some non-linearity distortion especially at higher input levels.
PAM is a +1 multiplier (Figure 16). It either outputs the positive or the negative of the input level, in accordance with the Non-Return-to-Zero digital input signal (NRZ) coming from the microcontroller. BF245C is a JFET which acts as a bipolar switch. When closed, the op-amp behaves as inverting, otherwise as non-inverting. The internal on- resistance of the JFET is around 100Q, so the off-resistance is set externally (by the parallel resistor) to 10kQ such that the geometric mean equals to the input resistance (1kQ). This causes a small decrease in the modulator gain, together with some non-linearity distortion especially at higher input levels.
The circuit in Figure 18 is a complete CVSD decoder which combines the syllabic filter, logarithmic amplifier, pulse amplitude modulator, reconstruction integrator and the power amplifier. It needs a single 5V supply.
The circuit in Figure 18 is a complete CVSD decoder which combines the syllabic filter, logarithmic amplifier, pulse amplitude modulator, reconstruction integrator and the power amplifier. It needs a single 5V supply.
Figure 19 — Gain versus DC volume control
Figure 19 — Gain versus DC volume control
Figure 21 shows the voltage on the integration capacitor (100nF) parallel to the pot, which converts the digital input NRZ into an analog signal. This is in fact the compressed form of the original signal with a very limited dynamic range, similar to an AGC-applied voice signal.
Figure 21 shows the voltage on the integration capacitor (100nF) parallel to the pot, which converts the digital input NRZ into an analog signal. This is in fact the compressed form of the original signal with a very limited dynamic range, similar to an AGC-applied voice signal.
Figure 20 — Original Input / Decoded Output Signal
Figure 20 — Original Input / Decoded Output Signal
Figure 23 — Logarithmic Modulation Signal
Figure 23 — Logarithmic Modulation Signal
Figure 24 — Decoding Software Flowchart
Figure 24 — Decoding Software Flowchart
In SPI mode, the data direction on the signal lines is fixed and the data will be transferred in byte oriented serial communication [11]. The command frame from host to card is a fixed-length packet as shown in Figure 25. After a command frame has been sent to the card, a response to the command will be sent back from the card. Because the data transfer is driven by the serial clock generated by host controller, the host controller must continue to read data, send a OxFF and get received byte, until a valid response is detected. The response should be sent back within the command response time (NCR). The specification contains a rich command set, of which the following ones are necessary for our application:
In SPI mode, the data direction on the signal lines is fixed and the data will be transferred in byte oriented serial communication [11]. The command frame from host to card is a fixed-length packet as shown in Figure 25. After a command frame has been sent to the card, a response to the command will be sent back from the card. Because the data transfer is driven by the serial clock generated by host controller, the host controller must continue to read data, send a OxFF and get received byte, until a valid response is detected. The response should be sent back within the command response time (NCR). The specification contains a rich command set, of which the following ones are necessary for our application:
Figure 26a — Decoding Software Flowchart for SD (Tightly Interlaced)
Figure 26a — Decoding Software Flowchart for SD (Tightly Interlaced)
This loosely-interlaced (1:7) arrangement will save 43% memory as compared to the previous tightly-interlaced (1:1) method. Figure 26b exhibits the distinct part in the decoding algorithm. Appendix 4 is the sample decoder software fot 89S8253.
This loosely-interlaced (1:7) arrangement will save 43% memory as compared to the previous tightly-interlaced (1:1) method. Figure 26b exhibits the distinct part in the decoding algorithm. Appendix 4 is the sample decoder software fot 89S8253.
The index table will occupy the first 100 sectors. Eact sector of 512 bytes holds info for 64 records as below: The information for each record consists of the start address and length (in terms of sectors). Both are 32-bit entries.
The index table will occupy the first 100 sectors. Eact sector of 512 bytes holds info for 64 records as below: The information for each record consists of the start address and length (in terms of sectors). Both are 32-bit entries.
The SD card is partitioned by the manufacturer, in order to be recognized as a logical drive by a computer operating system (OS). This is accomplished by writing a Master Boot Record (MBR) to the very beginning (sector 0) of the memory space (physical address). MBR contains the partition table, which holds the partition entries for each logical drive. Each partition entry possesses the 4-byte Logical Block Address (LBA) of the first absolute sector in the partition. When formatted by the OS, this first absolute sector of every ogical drive will contain the File Allocation Table (FAT). Considering the complex structure of any FAT, we prefer not to format the card by the OS; instead we write the audio data directly as image. A simple index table will be added to the top if multiple recordings exist, as follows:
The SD card is partitioned by the manufacturer, in order to be recognized as a logical drive by a computer operating system (OS). This is accomplished by writing a Master Boot Record (MBR) to the very beginning (sector 0) of the memory space (physical address). MBR contains the partition table, which holds the partition entries for each logical drive. Each partition entry possesses the 4-byte Logical Block Address (LBA) of the first absolute sector in the partition. When formatted by the OS, this first absolute sector of every ogical drive will contain the File Allocation Table (FAT). Considering the complex structure of any FAT, we prefer not to format the card by the OS; instead we write the audio data directly as image. A simple index table will be added to the top if multiple recordings exist, as follows:
Figure 27 — Embedded Playback Software Flowchart
Figure 27 — Embedded Playback Software Flowchart
This is the CVSD encoder software, which simulates the codec hardware depicted in Section 3. The valid input is an uncompressed audio file with WAV extension. So the existing audio file (generally in MP3 format sampled at 16 ~ 44.1 kHz) must first be converted to PCM format by an additional audio utility (such as Lame, Audacity or Goldwave). WAV2SES will re-sample the input data at the encoding clock rate (e.g. 96 kHz). No input filter has been implemented; the audio can be filtered through the auxiliary utility whenever needed. The output of WAV2SES is the aforementioned bit-stream, packed into a file with the extension SES (“voice” in Turkish). Syllabic filter time constant, reconstruction filter’s first and second pole time constants, logarithmic amplifier parameters, PAM gain, overload algorithm bits and the interlacing mode can be selected freely. It can also normalize the input audio signal. WAV2SES uses the formulae given in Section 4. The Overload Algorithm is implemented as per Figure 28. Bits represents the shift-register size and the recommended value is 4.
This is the CVSD encoder software, which simulates the codec hardware depicted in Section 3. The valid input is an uncompressed audio file with WAV extension. So the existing audio file (generally in MP3 format sampled at 16 ~ 44.1 kHz) must first be converted to PCM format by an additional audio utility (such as Lame, Audacity or Goldwave). WAV2SES will re-sample the input data at the encoding clock rate (e.g. 96 kHz). No input filter has been implemented; the audio can be filtered through the auxiliary utility whenever needed. The output of WAV2SES is the aforementioned bit-stream, packed into a file with the extension SES (“voice” in Turkish). Syllabic filter time constant, reconstruction filter’s first and second pole time constants, logarithmic amplifier parameters, PAM gain, overload algorithm bits and the interlacing mode can be selected freely. It can also normalize the input audio signal. WAV2SES uses the formulae given in Section 4. The Overload Algorithm is implemented as per Figure 28. Bits represents the shift-register size and the recommended value is 4.
[V.| / G check assures low frequency compensation (including DC). This predictive measure seems to be effective indeed to decrease the slope overload and thereby the noise level. The table below contains comparison data of the sample azan file (Figure 29) for different configurations: The selected predictive buffer length is 800 and the slope coefficient 1.33, as explained above. Analysis shows that the SNR increases by 4 dB for 1:1-interlaced coding and 2 dB for 1:7 interlacing. Maximum Overload Length and Distortion also become significantly reduced. Nevertheless, the results can differ from sample to sample.
[V.| / G check assures low frequency compensation (including DC). This predictive measure seems to be effective indeed to decrease the slope overload and thereby the noise level. The table below contains comparison data of the sample azan file (Figure 29) for different configurations: The selected predictive buffer length is 800 and the slope coefficient 1.33, as explained above. Analysis shows that the SNR increases by 4 dB for 1:1-interlaced coding and 2 dB for 1:7 interlacing. Maximum Overload Length and Distortion also become significantly reduced. Nevertheless, the results can differ from sample to sample.
This way, the slope closely tracks the target step-size. In practice, tl he target vo tage should be about 4 higher than that of the envelope detector to minimize slope overload. This makes the slope coe increase t the slope he granular overload. T depends on the input seems to fficient equal to 133%. Larger values noise, whereas smaller values enlarge he optimum value for the buffer length signal; for azans, a number of near 800 be appropriate, which corresponds to a look-ahead time of 8 ms @ 96 kbps; for Quran recitations in contrast, a length of around 500 proves to be more suitable (5 ms @ 96 kbps). The target step-size decay time is adjusted by the software as to be same with the look-ahead time. The prediction equations are presented below:
This way, the slope closely tracks the target step-size. In practice, tl he target vo tage should be about 4 higher than that of the envelope detector to minimize slope overload. This makes the slope coe increase t the slope he granular overload. T depends on the input seems to fficient equal to 133%. Larger values noise, whereas smaller values enlarge he optimum value for the buffer length signal; for azans, a number of near 800 be appropriate, which corresponds to a look-ahead time of 8 ms @ 96 kbps; for Quran recitations in contrast, a length of around 500 proves to be more suitable (5 ms @ 96 kbps). The target step-size decay time is adjusted by the software as to be same with the look-ahead time. The prediction equations are presented below:
be in discrete steps, but rather be curved through the 2" order integrator. Figure 30 — 96 kbps, OdBm, unfiltered
be in discrete steps, but rather be curved through the 2" order integrator. Figure 30 — 96 kbps, OdBm, unfiltered
Figure 31 — 96 kbps, OdBm, filtered
Figure 31 — 96 kbps, OdBm, filtered
Figure 33 — 96 kbps, -40dBm, filtered Figure 32 — 96 kbps, -40dBm, unfiltered
Figure 33 — 96 kbps, -40dBm, filtered Figure 32 — 96 kbps, -40dBm, unfiltered
Figure 34 — 32 kbps, OdBm, unfiltered
Figure 34 — 32 kbps, OdBm, unfiltered
We have additionally tested the system with a full- amplitude 10 kHz wave to verify the frequency response (compare Figure 10). The simulation (Figures 38-39) shows that the codec can successfully reproduce a 0 dBm signal at 10 kHz, where the slope (step-size) is 10-fold compared to | kHz. The encoder output of the logarithmic amplifier in Figure 15 increases now to 4.7 volts to generate this much steeper ramp. Figure 38 — 96 kbps, OdBm, unfiltered with 10 kHz input,
We have additionally tested the system with a full- amplitude 10 kHz wave to verify the frequency response (compare Figure 10). The simulation (Figures 38-39) shows that the codec can successfully reproduce a 0 dBm signal at 10 kHz, where the slope (step-size) is 10-fold compared to | kHz. The encoder output of the logarithmic amplifier in Figure 15 increases now to 4.7 volts to generate this much steeper ramp. Figure 38 — 96 kbps, OdBm, unfiltered with 10 kHz input,
Figure 36 — 32 kbps, -40dBm, unfiltered
Figure 36 — 32 kbps, -40dBm, unfiltered
Signal-to-noise ratios for various conditions are simulated through WAV2SES. Five different frequencies covering the whole audible spectrum have been examined. The SNR filter is of Moving Average (MAF) type and its stop-band frequency is adjusted to one-tenth of the sampling rate (9.6 kHz for 96 kbps). The first two columns display the results obtained by using the standard design values, for 1“ and 2" order integration, respectively. The latter columns show the optimized cases where the integration time constants are adjusted for each frequency.
Signal-to-noise ratios for various conditions are simulated through WAV2SES. Five different frequencies covering the whole audible spectrum have been examined. The SNR filter is of Moving Average (MAF) type and its stop-band frequency is adjusted to one-tenth of the sampling rate (9.6 kHz for 96 kbps). The first two columns display the results obtained by using the standard design values, for 1“ and 2" order integration, respectively. The latter columns show the optimized cases where the integration time constants are adjusted for each frequency.
The system also behaves well at low frequencies, up to DC. Figures 41 and 42 show the full-amplitude DC-offset response of the codec; filtered and unfiltered, respectively. Here, the input is supplied with +5 volts with respect to the analog ground (+5V). Figure 41 — 96 kbps, unfiltered, with +5 V DC input
The system also behaves well at low frequencies, up to DC. Figures 41 and 42 show the full-amplitude DC-offset response of the codec; filtered and unfiltered, respectively. Here, the input is supplied with +5 volts with respect to the analog ground (+5V). Figure 41 — 96 kbps, unfiltered, with +5 V DC input
The notched appearance of the output wave should not mislead the reader; since the input is not a_ physical microphone but a digitally sampled audio-file instead; our original input is not a perfect sine wave either. The highest sampling rate of an audio file is generally 44.1 kHz (CD quality). A 10 kHz pure sine wave sampled at 44.1 kHz is depicted in Figure 40 for comparison.
The notched appearance of the output wave should not mislead the reader; since the input is not a_ physical microphone but a digitally sampled audio-file instead; our original input is not a perfect sine wave either. The highest sampling rate of an audio file is generally 44.1 kHz (CD quality). A 10 kHz pure sine wave sampled at 44.1 kHz is depicted in Figure 40 for comparison.
Figure 39 — 96 kbps, OdBm, filtered, 10 kHz input
Figure 39 — 96 kbps, OdBm, filtered, 10 kHz input
Related topics:
Audio Signal ProcessingVoice (Music)Pulse Amplitude Modulation (PAM)8051 MicrocontrollerMusic Technology /Audio EngineeringAudio and Video CodecsElectronics Devices and CircuitsAdaptive Delta ModulationSd Card
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