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Table 1. Aspect ratios for the DCC. Since 1; = J, by the current mirroring action of the transistors M3 and M4 therefore the voltage offset is given by: from the above equations AV is obtained as:

Table 1 Aspect ratios for the DCC. Since 1; = J, by the current mirroring action of the transistors M3 and M4 therefore the voltage offset is given by: from the above equations AV is obtained as:

Related Figures (21)

The MOS realization of the DCC is shown in Fig. 1(b). All transistors are assumed to be operat- ing in the saturation region with the sources connected to their substrates. The Y terminal voltage is applied to
The MOS realization of the DCC is shown in Fig. 1(b). All transistors are assumed to be operat- ing in the saturation region with the sources connected to their substrates. The Y terminal voltage is applied to
Fig. 1a. The differential current conveyor.
Fig. 1a. The differential current conveyor.
Table 2. Aspect ratios for the MDCC. Thus the cells can be used as a four quadrant mul- tiplier/transconductance. Fig. 4(c) represents the mul- tiplier output current when the voltage V1 is scanned for different values of the differential gate voltage. To realize a multiplier with a high impedance the cell of
Table 2. Aspect ratios for the MDCC. Thus the cells can be used as a four quadrant mul- tiplier/transconductance. Fig. 4(c) represents the mul- tiplier output current when the voltage V1 is scanned for different values of the differential gate voltage. To realize a multiplier with a high impedance the cell of
Fig. 2a. The modified differential current conveyor. Fig. 2b. The MDCC circuit realization. which are operating in the ohmic region [10]. The configuration shown cancels both the even and the odd nonlinearities as discussed next.
Fig. 2a. The modified differential current conveyor. Fig. 2b. The MDCC circuit realization. which are operating in the ohmic region [10]. The configuration shown cancels both the even and the odd nonlinearities as discussed next.
Fig. 3a. PSPICE simulation of the voltage conveying property of the differential current conveyor.
Fig. 3a. PSPICE simulation of the voltage conveying property of the differential current conveyor.
Fig. 3b, PSPICE simulation of the differential current conveying property of the modified differential current conveyor.
Fig. 3b, PSPICE simulation of the differential current conveying property of the modified differential current conveyor.
Fig. 4b. A four quadrant multiplier using the MDCC. Fig. 4a. A four quadrant multiplier using the DCC. mode using op-amps, they usually suffer from the fi- nite gain-bandwidth product of the operational ampli- fiers used which limits the frequency range. The circuit shown in Fig. 5(a) represents a mixed mode second or- der bandpass filter based on the DCC. Transistors Mj and Mj. (i = 1,2) are operating in the ohmic region with their nonlinearities canceled out as shown in the previous section. The input to this filter section is a voltage while the output is a current and the transfer function is given by:
Fig. 4b. A four quadrant multiplier using the MDCC. Fig. 4a. A four quadrant multiplier using the DCC. mode using op-amps, they usually suffer from the fi- nite gain-bandwidth product of the operational ampli- fiers used which limits the frequency range. The circuit shown in Fig. 5(a) represents a mixed mode second or- der bandpass filter based on the DCC. Transistors Mj and Mj. (i = 1,2) are operating in the ohmic region with their nonlinearities canceled out as shown in the previous section. The input to this filter section is a voltage while the output is a current and the transfer function is given by:
Fig. 7(b) shows the highpass and lowpass current re- sponses of this filter with Cl = 0.1nf, C2 = 0.05nf, K1 = K2=K3=30uA/V” and Vz, = —2V, Vz,, = —5V fori = 1, 2, 3. Finally a universal current mode biquad ts shown in Fig. 7(a). The lowpass, bandpass and highpass current transfer functions are given respectively by:
Fig. 7(b) shows the highpass and lowpass current re- sponses of this filter with Cl = 0.1nf, C2 = 0.05nf, K1 = K2=K3=30uA/V” and Vz, = —2V, Vz,, = —5V fori = 1, 2, 3. Finally a universal current mode biquad ts shown in Fig. 7(a). The lowpass, bandpass and highpass current transfer functions are given respectively by:
Fig. 4c. PSPICE simulation of the multiplier shown in Fig. 4(b).
Fig. 4c. PSPICE simulation of the multiplier shown in Fig. 4(b).
Fig. 4d. Weighted sum multiplier circuit.
Fig. 4d. Weighted sum multiplier circuit.
Fig. 5a. A mixed mode second order band-pass filter.
Fig. 5a. A mixed mode second order band-pass filter.
Fig. 5b. The band-pass frequency response of the filter shown in Fig. 5(a).
Fig. 5b. The band-pass frequency response of the filter shown in Fig. 5(a).
Fig. 6a. A current mode low pass filter using MDCC.
Fig. 6a. A current mode low pass filter using MDCC.
Fig. 6b. The frequency response of the low-pass current mode filter shown in Fig. 6(a).
Fig. 6b. The frequency response of the low-pass current mode filter shown in Fig. 6(a).
Fig. 7a. A universal current mode filter based on the MDCC.
Fig. 7a. A universal current mode filter based on the MDCC.
Fig. 7b. The low-pass and high-pass frequency responses of the filter shown in Fig. 7(a).
Fig. 7b. The low-pass and high-pass frequency responses of the filter shown in Fig. 7(a).
Hassan O. Elwan was born in Cairo, Egypt in 1971. He received his B.Sc. degree with honors from the elec- tronics and communication department Cairo Univer- sity 1994. He was appointed as a T.A. in the same year and is now working to receive his M.Sc. degree. His research interests include current mode circuit design, filtering, mixed D/A systems and VLSI design and test.
Hassan O. Elwan was born in Cairo, Egypt in 1971. He received his B.Sc. degree with honors from the elec- tronics and communication department Cairo Univer- sity 1994. He was appointed as a T.A. in the same year and is now working to receive his M.Sc. degree. His research interests include current mode circuit design, filtering, mixed D/A systems and VLSI design and test.
Ahmed M. Soliman was born in Cairo Egypt, on November 22, 1943. He received the B.S. degree from Cairo University, Egypt, in 1964, and the M.S. and Ph.D. degrees from the University of Pittsburgh, PA., U.S.A. in 1967 and 1970, respectively, all in electrical engineering.
Ahmed M. Soliman was born in Cairo Egypt, on November 22, 1943. He received the B.S. degree from Cairo University, Egypt, in 1964, and the M.S. and Ph.D. degrees from the University of Pittsburgh, PA., U.S.A. in 1967 and 1970, respectively, all in electrical engineering.
Related topics:
Mixed ModeAnalog VLSIElectrical and Electronic EngineeringCurrent ConveyorCurrent Mode
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