A Multi-Processor Approach to SAT-Problems

2013

Boolean Satisfiability (SAT) is a well known NP-complete problem that forms the basis of modern constraint solving. The canonical problem consists of a conjunction of boolean clauses where each clause is a disjunction of literals. The problem is to determine whether there exists a satisfying assignment (and find it if it does). Despite the theoretical hardness of the SAT problem, modern solvers are extremely efficient and sophisticated in terms of the algorithms and heuristics they use. This is especially true for industrial instances generated from practical applications. Even so, further performance gains are harder to produce, while there still exist instances that are unsolvable by modern solvers. Fortunately, this is also a time when the generalization and availability of multicore hardware makes it easier to take advantage of parallel processing capabilities for further speedups. In this paper, we focus on massive parallelization (very large number of processors) of SAT solver...

2017

NP-Complete problems have an important attribute that if one NP-Complete problem can be solved in polynomial time, all NP-Complete problems will have a polynomial solution. The 3-CNF-SAT problem is a NP-Complete problem and the primary method to solve it checks all values of the truth table. This task is of the {\Omega}(2^n) time order. This paper shows that by changing the viewpoint towards the problem, it is possible to know if a 3-CNF-SAT problem is satisfiable in time O(n^10) or not? In this paper, the value of all clauses are considered as false. With this presumption, any of the values inside the truth table can be shown in string form in order to define the set of compatible clauses for each of the strings. So, rather than processing strings, their clauses will be processed implicating that instead of 2^n strings, (O(n^3)) clauses are to be processed; therefore, the time and space complexity of the algorithm would be polynomial.

Annals of Mathematics and Artificial Intelligence, 1996

We present a fast parallel SAT-solver on a message based MIMD machine. The input formula is dynamically divided into disjoint subformulas. Small subformulas are solved by a lhst sequential SAT-solver running on every processor, which is based on tbe Davis-Putnam procedure with a special heuristic lot variable selection. The algorithm uses optimized data structures to modify Boolean formulas. Additionally efficient workload balancing algorithms are used, to achieve a uniform distribution of workload among the processors. We consider the communication network topologies d-dimensional processor grid and linear processor array. Tests with up to 256 processors have shown very, good efficiency-values (> 0.95).

The combinatorial optimization problems are difficult to set up within a parallel context: a search-space is built during the computation and is explored in an irregular way. Moreover, the size of the search-space grows exponentially according to the size of the problem. Since the current processor industry is multiplying the number of cores in their product instead of increasing their frequency, setting up a parallel scheme to combinatorial problem remains needed. In this paper we focus on the SAT problem, which is central in theory of the Computer Science. We show different ways to solve SAT in parallel and we explain the advantages and the shortages of them. Then we explain how to design a parallel SAT solver that is able to keep the very efficient sequential techniques while parallelizing the work among the available cores. Obviously, the key-feature for the SAT community is to parallelize a sequential SAT solver since last sequential improvements are embedded in it. To answer these problems we propose a parallel SAT solver called MTSS (for Multi-Threaded SAT Solver).

Design, Automation, and Test in Europe, 2002

In this paper we propose a novel approach for solving the Boolean satisfiability problem by combining software and reconfigurable hardware. The suggested technique avoids instance-specific hardware compilation and, as a result, achieves a higher performance than pure software approaches. Moreover, it permits problems that exceed the resources of the available reconfigurable hardware to be solved.

Journal on Satisfiability, Boolean Modeling and Computation, 2009

In this paper, ManySAT a new portfolio-based parallel SAT solver is thoroughly described. The design of ManySAT benefits from the main weaknesses of modern SAT solvers: their sensitivity to parameter tuning and their lack of robustness. ManySAT uses a portfolio of complementary sequential algorithms obtained through careful variations of the standard DPLL algorithm. Additionally, each sequential algorithm shares clauses to improve the overall performance of the whole system. This contrasts with most of the parallel SAT solvers generally designed using the divide-and-conquer paradigm. Experiments on many industrial SAT instances, and the first rank obtained by ManySAT in the parallel track of the 2008 SAT-Race clearly show the potential of our design philosophy.

ArXiv, 2017

A novel parallel algorithm for solving the classical Decision Boolean Satisfiability problem with clauses in conjunctive normal form is depicted. My approach for solving SAT is without using algebra or other computational search strategies such as branch and bound, back-forward, tree representation, etc. The method is based on the special class of SAT problems, Simple SAT (SSAT). The algorithm's design includes parallel execution, object oriented, and short termination as my previous versions but it keep track of the tested unsatisfactory binary values to improve the efficiency and to favor short termination. The resulting algorithm is linear with respect to the number of clauses plus a process data on the partial solutions of the subproblems SSAT of an arbitrary SAT and it is bounded by $2^{n}$ iterations where $n$ is the number of logical variables. The novelty for the solution of arbitrary SAT problems is a linear algorithm, such its complexity is less or equal than the algor...

2012

Abstract This paper provides a broad overview of the situation in the area of Parallel Search with a specific focus on Parallel SAT Solving. A set of challenges to researchers is presented which, we believe, must be met to ensure the practical applicability of Parallel SAT Solvers in the future. All these challenges are described informally, but put into perspective with related research results, and a (subjective) grading of difficulty for each of them is provided.

Journal of Automated Reasoning, 2000

In this paper, we present the architecture of a new SAT solver using reconfigurable logic and a virtual logic scheme. Our main contributions include new forms of massive fine-grain parallelism, structured design techniques based on iterative logic arrays that reduce compilation times from hours to minutes, and a decomposition technique that creates independent subproblems that may be concurrently solved by unconnected FPGAs. The decomposition technique is the basis of the virtual logic scheme, since it allows solving problems that exceed the hardware capacity. Our architecture is easily scalable. Our results show several orders of magnitude speedup compared with a state-of-the-art software implementation, and also with respect to prior SAT solvers using reconfigurable hardware.

Artificial Intelligence Review, 2018

Boolean satisfiability (SAT) has been studied for the last twenty years. Advances have been made allowing SAT solvers to be used in many applications including formal verification of digital designs. However, performance and capacity of SAT solvers are still limited. From the practical side, many of the existing applications based on SAT solvers use them as blackboxes in which the problem is translated into a monolithic conjunctive normal form instance and then throw it to the SAT solver with no interaction between the application and the SAT solver. This paper presents a comprehensive study and analysis of the latest developments in SAT-solver and new approaches that used in branching heuristics, Boolean constraint propagation and conflict analysis techniques during the last two decade. In addition, the paper provides the most effective techniques in using SAT solvers as verification techniques, mainly model checkers, to enhance the SAT solver performance, efficiency and productivity. Moreover, the paper presents the remarkable accomplishments and the main challenges facing SAT-solver techniques and contrasts between different techniques according to their efficiency, algorithms, usage and feasibility.