Targeting Heterogeneous Architectures via Macro Data Flow

2019 International Conference on High Performance Computing & Simulation (HPCS)

Starting from a Data-Flow execution model called "DF-Threads", we defined a minimalistic API to enable an efficient implementation in the hardware of the distribution of the threads across the cores of a single multi-core system and across the remote cores of a cluster. We aim at proposing this API as a simple programming model in C language that can potentially permit an easy interface between DF-Threads and generic programming models. Clusters are typically programmed with MPI, therefore we evaluated our approach against OpenMPI. If we consider the delivered GFLOPS per core, DF-Threads are also competitive in respect to CUDA. In the basic examples, that we used in this initial investigation, DF-Threads achieve better performance-per-core compared to OpenMPI and CUDA. In particular, OpenMPI has a large portion of OS-kernel activity, which is slowing down its performance.

2013

Current advances in computer architectures have transformed clusters, traditional high performance distributed platforms, into hierarchical environments, where each node has multiple heterogeneous processing units including accelerators such as GPUs. Although parallel heterogeneous environments are getting common, their efficient use is still an open problem. Current tools for development of parallel applications are mainly concerning with the exclusive use of accelerators, while we argue that the adequate coordination of heterogeneous computing cores can significantly improve performance. Our approach to efficiently use such environments, which is experimented in the context of replicated dataflow applications, consists of scheduling processing tasks according to their characteristics and to the processors specificities. Thus, we can better utilize the available hardware as we try to execute each task into the best-suited processor for it. The proposed approach has been evaluated using two applications, for which there were previously available CPU-only and GPU-only implementations. The experimental results show that using both devices simultaneously can improve the performance significantly, moreover, the proposed method doubled the performance of a demand driven approach that utilizes both CPU and GPU, on the two applications in several scenarios. The problem discussed in this chapter is that of efficiently executing component-based applications on heterogeneous clusters of GPU-equipped multi-core computers. The proposed techniques are evaluated in the context of the filter-stream programming model, a type of dataflow system where applications are decomposed into components, called filters, which can be replicated on multiple nodes of a distributed system. These filters communicate using logical streams that are capable of delivering data from an instance of the source filter to an instance of the destination filter. Filters, in our run-time framework, are multi-threaded and may have different versions of their codes so they can execute on heterogeneous processors. An important facet of our work is that the performance of accelerators, such as GPUs, are data-dependent, meaning that the speedup achieved over the CPU varies according to the type of computation and the

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

Future exascale machines will require multi-/ many-core architectures able to efficiently run multi-threaded applications. Data-flow execution models have demonstrated to be capable of improving execution performance by limiting the synchronization overhead. This paper proposes to augment cores with a minimalistic set of hardware units and dedicated instructions that allow efficiently scheduling the execution of threads on the basis of data-flow principles. Experimental results show performance improvements of the system when compared with other techniques (e.g., OpenMP, Cilk) 1 .

Concurrency and Computation: Practice and Experience, 2018

2020

Nowadays embedded systems are increasingly used in the world of distributed computing to provide more computational power without having to change the whole system and the programming model. We propose a DataFlow Execution Engine (DEE) to spawn asynchronous, data-driven threads, among embedded cores to achieve a seamless distribution of threads without the need of using a distributed programming model. Our idea relies on the creation of a hardware scheduler that can handle creation, thread-dependency, and locality of many fine-grained tasks. We present an initial evaluation of our DEE that is suited for FPGA implementation. Our initial results show the importance of a hardware based support for such thread execution model.

2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Many of the heterogeneous resources available to modern computers are designed for different workloads. In order to efficiently use GPU resources, the workload must have a greater degree of parallelism than a workload designed for multicore-CPUs. And conceptually, the Intel Xeon Phi coprocessors are capable of handling workloads somewhere in between the two. This multitude of applicable workloads will likely lead to mixing multicore-CPUs, GPUs, and Intel coprocessors in multi-user environments that must offer adequate computing facilities for a wide range of workloads. In this work, we are using a lightweight runtime environment to manage the resource-specific workload, and to control the dataflow and parallel execution in two-way hybrid systems. The lightweight runtime environment uses task superscalar concepts to enable the developer to write serial code while providing parallel execution. In addition, our task abstractions enable unified algorithmic development across all the heterogeneous resources. We provide performance results for dense linear algebra applications, demonstrating the effectiveness of our approach and full utilization of a wide variety of accelerator hardware.

2010

Sequoia expresses parallelism through explicit task and data subdivision. The programmer constructs trees of dependent tasks

We present Athapascan-1, a language implemented as a C++ library that enables the on-line computation of the macro-data flow derived from the data-dependencies of a parallel application. The parallelism is explicit but synchronization implicit. The semantics of Athapascan-1 is data driven; it is independent from the scheduling algorithm used to execute the application. The overhead introduced is bounded with respect to the parallelism expressed by the user: each basic computation corresponds to a user-defined task, each data-dependency to a user-defined data structure. Then, the performance of a code (parallel time, communication and arithmetic works, memory space) can be evaluated directly from a cost model without need of a machine model. Keywords: Multithreading, macro-data flow languages, on-line scheduling, parallel complexity. I. Introduction Recent work in the field of parallel programming has resulted in the definition of extensions of sequential languages that can be effici...

PloS one, 2017

Nowadays, a typical processor may have multiple processing cores on a single chip. Furthermore, a special purpose processing unit called Graphic Processing Unit (GPU), originally designed for 2D/3D games, is now available for general purpose use in computers and mobile devices. However, the traditional programming languages which were designed to work with machines having single core CPUs, cannot utilize the parallelism available on multi-core processors efficiently. Therefore, to exploit the extraordinary processing power of multi-core processors, researchers are working on new tools and techniques to facilitate parallel programming. To this end, languages like CUDA and OpenCL have been introduced, which can be used to write code with parallelism. The main shortcoming of these languages is that programmer needs to specify all the complex details manually in order to parallelize the code across multiple cores. Therefore, the code written in these languages is difficult to understand...

2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Today computer architectures are shifting from single core to manycores due to several reasons such as performance demands, power and heat limitations. However, shifting to manycores results in additional complexities, especially with regard to efficient development of applications. Hence there is a need to raise the abstraction level of development techniques for the manycores while exposing the inherent parallelism in the applications. One promising class of programming languages is dataflow languages and in this paper we evaluate and optimize the code generation for one such language, CAL. We have also developed a communication library to support the intercore communication. The code generation can target multiple architectures, but the results presented in this paper is focused on Adapteva's many core architecture Epiphany. We use the twodimensional inverse discrete cosine transform (2D-IDCT) as our benchmark and compare our code generation from CAL with a handwritten implementation developed in C. Several optimizations in the code generation as well as in the communication library are described, and we have observed that the most critical optimization is reducing the number of external memory accesses. Combining all optimizations we have been able to reduce the difference in execution time between auto-generated and handwritten implementations from a factor of 4.3x down to a factor of only 1.3x.