Two-layer channel routing with vertical unit-length overlap

Parallel Processing Letters, 1997

We provide efficient parallel algorithms for the minimum separation, offset range, and optimal offset problems for single-layer channel routing. We consider all the variations of these problems that are known to have lineartime sequential solutions rather than limiting attention to the "river-routing" context, where single-sided connections are disallowed. For the minimum separation problem, we obtain O(lg N) time on a CREW PRAM or O(lg N lg lg N) time on a (common) CRCW PRAM, both with optimal work (processortime product) of O(N), where N is the number of terminals. For the offset range problem, we obtain the same time and processor bounds as long as only one side of the channel contains single-sided nets. For the optimal offset problem with single-sided nets on one side of the channel, we obtain time O(lg N lg lg N) on a CREW PRAM or O(lg N lg lg N) time on a CRCW PRAM with O(N lg lg N) work. Not only does this improve on previous results for river routing, but we can obtain an even better time of O((lg lg N) 2) on the CRCW PRAM in the river routing context. In addition, wherever our results allow a channel boundary to contain single-sided nets, the results also apply when that boundary is ragged and N incorporates the number of bendpoints.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1985

We develop algorithms for the two-tcrminnl n-nct channel rouling problem on the IJ-luyer model when k-fold overlap IS allowetl, k~2, For k::;: fl./ 21-2 we show how Lo solve the chflnncl rOllling problem using rtj k + 1 lracks. which is only one track mor"c than the oplimal channel wiuLh. 1"01' [L/;':;]-l~k ::;:f/,/21+1 the width w~cd by our OIlgol'iLhrns dtfTers fl'OIll lIw oplimal one by a smull conslanL faclol". lYe i.lIsa present illgOl"jlhrns fot" the :J-allu /~-Jaycr model wilh double over);:tp LJ1O.ll usc fewer Lr'uc](s Lhilll t.he genet'al cllollncl rouLing algorilhrrL All algorithms lise O(n) conlact poinls and 1'1I1l in lime O(n). Key \"Iords Channel rou'jng, lwo-lcrrninal neLs. avcdap, challllel widLh. conlacl poinLs.

Algorithmica, 1987

We examine the .problem of routing wires on a VLSI chip, where the pins to be· connected are arranged in a regular rectangular array. We obtain tight bounds for the worst-case "channelwidth" needed to route an n X n array, and develop provably good heuristics for the general case. An interesting "rounding algorithm U for obtaining integral approximations to solutions of linear equations is used to show the near-optimality of single-turn routings in the worst-case.

2004

Let l H and l V denote the number of layers reserved for horizontal (vertical) wire segments in the multilayer dogleg-free Manhattan model. [d/l H ] is a lower bound for the minimum width for routing a channel of density d where [x] denotes the upper integer part of x. A greedy interval packing algorithm realizes every channel routing problem with width )] in linear time if l V ≥2. The second author has shown that in case l V =l H =k>1, it is NP-complete to decide whether a channel routing problem can be solved with width [d/k] in the dogleg-free 2k-layer Manhattan model. Here we turn to the remaining case. In the special case l V =1 and l H =2 we show its relation to the NP-complete problem for the usual 2-layers Manhattan model and we point out a relation of the routing problem to a 2-processor job sheduling problem.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988

We present in this paper a new approach to the three or four layer channel routing problem. Since two layer channel routing has been well studied, there are several two layer routers which can produce optimal or near optimal solution for almost all the practical problems. We develop a general technique which transforms a two layer routing solution systematically into a three layer routing solution. The solution transformation approach is different from previous approaches for three layer and multi-layer channel routing. Our router performs well in comparison with other three layer channel routers proposed thus far. In particular, it provides a 10-track optimal solution for the famous Deutsch's difficult example, whereas other well-known three layer channel routers required 11 or more tracks. We extend our approach to four layer channel routing. Given any two layer channel routing solution without unrestricted dogleg that uses w tracks, our router can provably obtain a four layer routing solution using no more than w /2 tracks. We also give a new theoretical upper bound d /2 + 2 for arbitrary four layer channel routing problems.

In this paper, we employ gridded model for channel routing and place the terminals which are horizontally aligned. We have developed a two-layer channel router that can eliminate the constraints due to overlap. The proposed approach is suitable for cell/IP-based channel-less circuit with a few channels. Our developed tool can route the nets in nearly linear time achieving to the advantage of time to market, and lead to the area overhead of 6.34% increase in average. The area overhead results from the space insertion, and we also have shown that the proposed algorithm can achieve 100% routing on most ISCAS'85 benchmarks. In addition, the number of channel tracks can be minimized by our algorithm. We proposed the star-routing algorithm for three layers channel routing using Manhattan-Diagonal Model to solve the channel routing problem. We drew up the smaller grid-model, and in order to avoid violating the DRC, so the algorithm has a restriction for the third metal-layer in routing...

Information Processing Letters, 1992

Greenberg, R.I. and F. Miller Maley, Minimum separation for single-layer channel routing, Information Processing Letters 43 (1992) 201 205.

Integration, the VLSI Journal, 1998

Channel routing is a key problem in the physical design of VLSI chips. It is known that max(d , v) is a lower bound on the number of tracks required in the reserved two-layer Manhattan routing model, where d is the channel density and v is the length of the longest path in the vertical constraint graph. In this paper we propose a deterministic polynomial time algorithm that computes a better and non-trivial lower bound on the number of tracks required for routing a channel without doglegging. This algorithm is also applicable for computing a lower bound on the number of tracks in the three-layer no-dogleg HVH routing as well as two-and three-layer restricted dogleg routing models.

IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, 1992

A parallel algorithm for channel routing problems is presented in this paper. The channel routing problem is very important in the automatic layout design of VLSI circuits and printed circuit boards. The problem is to route the given interconnections between two rows of terminals on a multilayer channel where the channel area must be minimized. Although several algorithms have been proposed for two-layer problems, two-layer-and-over-the-cell problems, and three-layer problems, the current advancement of VLSI chip technology allows us to use four layers composed of two metal layers and two polysilicon layers for routing in a chip. The goal of the proposed parallel algorithm is to find the near-optimum routing solution for the given interconnections in a short time. The algorithm is applied for the four-layer channel routing problems where it requires n x m x 2 processing elements for the n-netm-track problem. The algorithm has three advantages over the conventional algorithms: 1) it can be easily modified for accommodating more than four-layer problems, 2) it runs not only on a sequential machine but also on a parallel machine with maximally n x m x 2 processors, and 3) the program size is very small. The algorithm is verified by solving seven benchmark problems where the algorithm finds routing solutions in a nearly constant time with n X m x 2 processors.

Integration, the VLSI Journal, 1991

In this paper we consider two-terminal channel routing problems in a Diagonal Model (DM), where the grid consists of right and left tracks displayed at + 45 o and-45 o on two layers. As in the Manhattan Model, the tracks are displaced in two layers with the left tracks on one layer and the right tracks on the other. In DM we prove a new lower bound to the channel width equal to d, and present an algorithm that obtains 2d +3 as an upper bound, where d is the channel density.