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Outline

Title
Abstract
Acknowledgements
Lexical Analysis 2.1 Introduction
Syntax Analysis
The Design Space of Types
Case-Statements
Translating Structured Data
Introduction
Liveness Analysis
Function Calls 10.1 Introduction
Analysis and Optimisation
Data-Flow Analysis
Example of Available-Assignments Analysis
Limitations of Data-Flow Analyses
Memory Management 12.1 Introduction
Limitations
Summary of Manual Memory Management
References

Basics of Compiler Design Anniversary edition

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sparkles

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The text provides an overview of compiler design, explaining the role of compilers in translating high-level programming languages into machine language. It outlines the advantages of using high-level languages for programming, such as ease of development and error detection by compilers, while also discussing the inherent performance trade-offs. Key phases of compilation are introduced, including lexical analysis and syntax analysis, which structure the compilation process.

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References (81)

  1. Caller-saves versus callee-saves . . . . . . . . . . . . . . . . . .
  2. 5 Using registers to pass parameters . . . . . . . . . . . . . . . . .
  3. 6 Interaction with the register allocator . . . . . . . . . . . . . . . .
  4. 7 Accessing non-local variables . . . . . . . . . . . . . . . . . . . 10.7.1 Global variables . . . . . . . . . . . . . . . . . . . . . . 10.7.2 Call-by-reference parameters . . . . . . . . . . . . . . . . 10.7.3 Nested scopes . . . . . . . . . . . . . . . . . . . . . . . .
  5. 8 Variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.8.1 Variable-sized frames . . . . . . . . . . . . . . . . . . . . 10.8.2 Variable number of parameters . . . . . . . . . . . . . . . 10.8.3 Direction of stack-growth and position of FP . . . . . . . 10.8.4 Register stacks . . . . . . . . . . . . . . . . . . . . . . . 10.8.5 Functions as values . . . . . . . . . . . . . . . . . . . . .
  6. 9 Further reading . . . . . . . . . . . . . . . . . . . . . . . . . . . Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Analysis and optimisation 11.1 Data-flow analysis . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Common subexpression elimination . . . . . . . . . . . . . . . . 11.2.1 Available assignments . . . . . . . . . . . . . . . . . . . 11.2.2 Example of available-assignments analysis . . . . . . . .
  7. 2.3 Using available assignment analysis for common subex- pression elimination . . . . . . . . . . . . . . . . . . . .
  8. 3 Jump-to-jump elimination . . . . . . . . . . . . . . . . . . . . .
  9. 4 Index-check elimination . . . . . . . . . . . . . . . . . . . . . .
  10. 5 Limitations of data-flow analyses . . . . . . . . . . . . . . . . . .
  11. 6 Loop optimisations . . . . . . . . . . . . . . . . . . . . . . . . . 11.6.1 Code hoisting . . . . . . . . . . . . . . . . . . . . . . . . 11.6.2 Memory prefetching . . . . . . . . . . . . . . . . . . . .
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  13. 8 Specialisation . . . . . . . . . . . . . . . . . . . . . . . . . . . .
  14. 9 Further reading . . . . . . . . . . . . . . . . . . . . . . . . . . . Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Memory management 12.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2 Static allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.1 Limitations . . . . . . . . . . . . . . . . . . . . . . . . .
  15. 3 Stack allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .
  16. 3 succ, gen and kill for the program in figure 9.2 . . . . . . . . . . .
  17. Fixed-point iteration for liveness analysis . . . . . . . . . . . . .
  18. 5 Interference graph for the program in figure 9.2 . . . . . . . . . .
  19. 9 Colouring of the graph in figure 9.8 . . . . . . . . . . . . . . . .
  20. 1 Simple activation record layout . . . . . . . . . . . . . . . . . . .
  21. 2 Prologue and epilogue for the frame layout shown in figure 10.1 . 10.3 Call sequence for x := CALL f (a 1 , . . . , a n ) using the frame layout shown in figure 10.1 . . . . . . . . . . . . . . . . . . . . . . . . .
  22. 4 Activation record layout for callee-saves . . . . . . . . . . . . . .
  23. 5 Prologue and epilogue for callee-saves . . . . . . . . . . . . . . .
  24. 6 Call sequence for x := CALL f (a 1 , . . . , a n ) for callee-saves . . . . .
  25. 7 Possible division of registers for 16-register architecture . . . . . .
  26. 8 Activation record layout for the register division shown in figure 10.7216 10.
  27. 9 Prologue and epilogue for the register division shown in figure 10.7 10.10Call sequence for x := CALL f (a 1 , . . . , a n ) for the register division shown in figure 10.7 . . . . . . . . . . . . . . . . . . . . . . . . .
  28. 11Example of nested scopes in Pascal . . . . . . . . . . . . . . . . . 10.12Adding an explicit frame-pointer to the program from figure 10.11 10.13Activation record with static link . . . . . . . . . . . . . . . . . .
  29. 14Activation records for f and g from figure 10.11 . . . . . . . . . .
  30. 1 Gen and kill sets for available assignments . . . . . . . . . . . . .
  31. 2 Example program for available-assignments analysis . . . . . . .
  32. 3 pred, gen and kill for the program in figure 11.2 . . . . . . . . . .
  33. Fixed-point iteration for available-assignment analysis . . . . . .
  34. 5 The program in figure 11.2 after common subexpression elimination. 11.6 Equations for index-check elimination . . . . . . . . . . . . . . .
  35. 7 Intermediate code for for-loop with index check . . . . . . . . . .
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