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Outline

Novel sampling algorithm for DSP controlled 2 kW PFC converter

2001, IEEE Transactions on Power Electronics

https://doi.org/10.1109/63.911145

Abstract

This paper proposes a novel sampling algorithm for digital signal processing (DSP) controlled 2 kW power factor correction (PFCs) converters, which can improve switching noise immunity greatly in average-current-control power supplies. Based on the newly developed DSP chip TMS320F240, a 2 kW PFC stage is implemented. The novel sampling algorithm shows great advantages when the converter operates at a frequency above 30 kHz.

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