Graphical Construction of Parallel Programs

pas, 1995

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Science of Computer Programming, 2001

This paper deals with a technique that can support the re-engineering of parallel programs based on point-to-point communication primitives by detecting typical process interaction patterns in the code. Pattern detection is performed by the static analysis of the parallel program and by solving Diophantine sets of inequalities. The objective is to determine process interactions and to classify them into a set of commonly occurring interaction patterns.

Science of Computer Programming, 1997

AbstractÐ We formalise, using Category Theory, modularisation techniques for parallel and distributed systems based on the notion of superposition, showing that parallel program design obeys the "universal laws" formulated by J.Goguen for General Systems Theory, as well as other algebraic properties of modularity formulated for Specification Theory. The resulting categorical formalisation unifies the different notions of superposition that have been proposed in the literature and clarifies their algebraic properties with respect to modularisation. It also suggests ways of extending or revising existing languages in order to provide higher levels of reusability, modularity and incrementality in system design. (*) This work was partially supported by the Esprit BRA 8319 (MODELAGE), the HCM Scientific Network CHRX-CT92-0054 (MEDICIS), and the PRAXIS XXI contract 2/2.1/MAT/46/94 (ESCOLA).

2000

Parallel computing has failed to attract significant numbers of programmers outside the specialized world of supercomputing. This is due in part to the fact that despite the best efforts of many researchers, parallel programming environments are so hard to use that most programmers won't risk using them. We believe the major cause for this state of affairs is that most parallel programming environments focus on how concurrency is implemented rather than on how concurrency is exploited in a program design. In other words, bringing parallel computing to a broader audience requires solving the problem at the algorithm design level.

2009

We propose a class of hierarchical graphs equipped with a simple algebraic syntax as a convenient way to describe configurations in languages with inherently hierarchical features such as sessions, fault- handling scopes or transactions. The graph syntax can be seen as an intermediate representation language, that facilitates the encoding of structured specifications and, in particular, of process calculi, since it provides primitives for nesting, name restriction and parallel composition. The syntax is based on an algebraic presentation that faithfully characterises families of hierarchical graphs, meaning that each term of the language uniquely identifies an equivalence class of graphs (modulo graph isomorphism). Proving soundness and completeness of an encoding (i.e. proving that structurally equivalent processes are mapped to isomorphic graphs) is then facilitated and can be done by structural induction. Summing up, the graph syntax facilitates the definition of faithful encodings, yet allowing a precise visual representation. We illustrate our work with an application to a workflow language and a service-oriented calculus.

A design pattern is a description of a high-quality solution to a frequently occurring problem in some domain. A pattern language is a collection of design patterns that are carefully organized to embody a design methodology. A designer is led through the pattern language, at each step choosing an appropriate pattern, until the final design is obtained in terms of a web of patterns. This paper describes a pattern language for parallel application programs. The goal of our pattern language is to lower the barrier to parallel programming by guiding a programmer through the entire process of developing a parallel program.

1993

In this paper we propose an abstract representation, called Synchronized Generalized Program Graph (SGPG), for concurrent programs. SGPG incorporates the data a!epenakncies, control flow, control dependencies, communication, and synchronization primitives of the concurrent program it represents. The features of SGPG and the process of its construction are outlined. Algorithms for generating the SGPG representation of an imperative concurrent programs are discussed in detail. The producer consumer problem is used as an illustrative example. SGPG can be used for the study and analysis of concurrent programs, research involving the implementation, testing, , meaasurement of cognitive complexity, and for proving correctness of concurrent programs.

Concurrency: Practice and Experience, 2000

In this paper we describe one experiment in which a new co-ordination language, called MANIFOLD, is used to restructure an existing sequential Fortran 77 code from computational fluid dynamics (CFD), into a parallel application. MANIFOLD is a co-ordination language developed at CWI (Centrum voor Wiskunde en Informatica) in the Netherlands. It is very well suited for applications involving dynamic process creation and dynamically changing (ir)regular communication patterns among sets of independent concurrent cooperating processes. With a simple but generic master/worker protocol, written in the MANIFOLD language, we are able to reuse the existing code without rethinking or rewriting it. The performance evaluation of a standard 3D CFD problem shows that MANIFOLD performs very well. be spared. The resulting renovated software can then take advantage of the improved performance offered by modern parallel/distributed computing environments, without rethinking or rewriting the bulk of their existing code. The necessary communications between the different partners in such a new concurrent system can have different forms. In some cases, the channel structures representing the communication patterns between the different partners, are regular, and the number of the partners is fixed (structured static communication). In other cases, the communication patterns are irregular, and the number of partners changes over time (unstructured dynamic communication). There are many different languages and programming tools available that can be used to implement this kind of communication, representing very different approaches to parallel programming. Normally, languages such as Compositional C++, High Performance Fortran, Fortran M, Concurrent C(++) or tools (sometimes called middleware) such as MPI, PVM and PARMACS are used (see for some critical notes on these languages and middleware). However, a promising novel approach is the application of co-ordination languages [2-4].

cs.manchester.ac.uk

Despite rapid advances in parallel hardware performance, the full potential of processing power is not being exploited in the software community for one clear reason: the difficulty in designing efficient and effective parallel applications. Identifying sub-tasks within the application, designing parallel algorithms, and balancing load among the processing units has been a daunting task for novice programmers, and even the experienced programmers are often trapped with design decisions that underachieve in potential peak performance. Design patterns have been used as a notation to capture how experts in a given domain think about and approach their work. Over the last decade there have been several approaches in identifying common patterns that are repeatedly used in parallel software design process. Documentation of these design patterns helps the programmers by providing definition, solution and guidelines for common parallelization problems. A convenient way to further raise the level of abstraction and make it easier for programmers to write legible code is the philosophy of 'Separation of Concerns'. This separation is achieved by Aspect Oriented Programming (AOP) paradigm by allowing programmers to specify the concerns in an independent manner and letting the compiler 'weave' (AOP terminology for unification of modules) them at compile time. However, abstraction by its very nature often produces unoptimized code as it frames the solution of a problem without much thought to underlying machine architecture. Indeed, in the current phase of multicore era, where chip manufacturers are continuously experimenting with processor architectures, an optimization on one architecture might not yield any benefit on another from a different chip manufacturer. Using the auto-tuner one can automatically explore the optimization space for a particular computational kernel on a given processor architecture. The last relevant aspect of concern in this project would be the formal specification and verification of properties concerning parallel programs. It's well known fact that parallel programs are particularly prone to insidious defects such as deadlocks and race conditions due to shared variables and locking. Using tools from formal verification it is however possible to guarantee certain safety properties (such as deadlock and data race avoidance) while refining successive abstractions to code level. The interplay of abstractions, auto-tuning and correctness in the context of parallel software development will be considered in this project report.

1992

This paper describes Millipede, a graphical programming environment for a Transputer-based MIMD multiprocessor system. The environment provides a vi- sual extension to the CSP/Occam programming model. Parallel programs are described as graphs, where the nodes denote parallel processes and the edges de- note communication channels between processes. Graphs are constructed using a hierarchical graph editor which allows the user to group processes (nodes) together into hierarchical process structures. The highest level in the graph hierarchy, called the processor graph, also describes the processor network on which to execute the parallel program. Millipede contains tools for mapping processor graphs onto a re- configurable transputer network and for configuring the target processor network accordingly. Monitoring data, produced and collected by a performance monitoring system, can also be presented upon the processor graph.