Heuristic techniques in computer-aided circuit analysis

European Journal of Operational Research, 1989

An extensive search of journal publications on heuristic methods and applications produced 442 articles published in 37 journals during the last sixteen years. A scheme is employed to categorize each article according to 12 classes of heuristic approaches and 144 areas of applications (the latter taken from the OR/MS subject classification codes). An analysis of these data reveals some interesting historical patterns and directions for future work. This categorized survey should be helpful to students, teachers, researchers and practitioners interested in heuristics.

IEEE Transactions on Circuits and Systems, 1977

Absrrucf-An algorithm for computing dc solutions for electrouic circuits is presented. It is shown to be reliable and efficient. Numerical results are presented for practical circuits which include bipolar, FET, and Josephson junction circuits. A comparison of this algorithm with some of the existing algorithms is also presented.

Metrology and Measurement Systems, 2011

Two Heuristic Algorithms for Test Point Selection in Analog Circuit Diagnoses The paper presents a heuristic approach to the problem of analog circuit diagnosis. Different optimization techniques in the field of test point selection are discussed. Two new algorithms: SALTO and COSMO have been introduced. Both searching procedures have been implemented in a form of the expert system in PROLOG language. The proposed methodologies have been exemplified on benchmark circuits. The obtained results have been compared to the others achieved by different approaches in the field and the benefits of the proposed methodology have been emphasized. The inference engine of the heuristic algorithms has been presented and the expert system knowledge-base construction discussed.

Information Sciences, 1979

The purpose of this paper is to propose a formal framework for structuring and embedding the heuristic information, in o_rder to allow an algorithmic computation, in quite general cases, of the evaluation function An) of the classical Hart-Nilsson-Raphael algorithm. The notion of semantic graph is first introduced, in which the atomic notion of node is expanded by associating to it an internal structure where the heuristic information is inserted. It is proved that h(n) can be computed by solving an auxiliaq problem, obtained from the original one by adding new arcs, and of s4er complexity than that onw. A new algorithm is then defined for the computation of h(n) and for the determination of minimal solutions. The validity of the model proposed is discussed in detail.

This article deals with issues which we can meet when we want to analyze nonlinear dynamic circuits using Matlab environment. Theoretical basements of analysis of general type of circuits and their possible solution as computer algorithms are discussed first. Then methods of computer analysis of switched circuits are described later on.

IEEE Transactions on Education, 2000

The use of computer-aided analysis enhances classroom learning. A feedback amplifier problem has been structured to exhibit the fundamental differences between feedback amplifiers and their nonfeedback equivalents. Such classroom exercises enable students to bypass a multitude of arithmetic calculations and focus their attention on the basic underlying principles.

Computational Optimization and Applications, 2002

As general-purpose parallel computers are increasingly being used to speed up different VLSI applications, the development of parallel algorithms for circuit testing, logic minimization and simulation, HDL-based synthesis, etc. is currently a field of increasing research activity. This paper describes a circuit partitioning algorithm which mixes Simulated Annealing (SA) and Tabu Search (TS) heuristics. The goal of such an algorithm is to obtain a balanced distribution of the target circuit among the processors of the multicomputer allowing a parallel CAD application for Test Pattern Generation to provide good efficiency. The results obtained indicate that the proposed algorithm outperforms both a pure Simulated Annealing and a Tabu Search. Moreover, the usefulness of the algorithm in providing a balanced workload distribution is demonstrated by the efficiency results obtained by a topological partitioning parallel test-pattern generator in which the proposed algorithm has been included. An extented algorithm that works with general graphs to compare our approach with other state of the art algorithms has been also included.

Pistas Educativas, 2020

Some design trajectories were analyzed using a generalized design methodology. The starting point of the design process was changed to obtain different trajectories and compare them by processor time. Study of the phase portrait, consisting of a family of trajectories, allows us to analyze the acceleration effect. A special line, called a separatrix, divides а set of trajectories into two parts: with and without possible acceleration. The numerical results of the design of passive and active electronic circuits prove that the optimal choice of the starting point of the design algorithm allows you to minimize the time of the design process.

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03., 2003

An heuristic method to generate the topology of analog circuits at the most abstract level of design, is introduced. The generation approach is divided into two steps: the small-signal and bias-circuitry levels of design. The f irst step is focused on coupling four-nullators and four-norators bridges. The second step is focused on biasing nullator-norator pairs. The nullors in the generated circuit are synthesized furtherly by replacing them using either BJTs or MOSTs. Several examples demonstrate the suitability of the proposed technique to be used within an environment of analog design automation.