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Computer Science
Distributed Systems

A Flat Timing-Driven Placement Flow for Modern FPGAs

Profile image of Shawki AreibiShawki Areibi

2019, Proceedings of the 56th Annual Design Automation Conference 2019

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  106. 1 -Fast Performance Estimation and Design Space Exploration of Manycore-based Neural Processors.....1045
  107. Jintaek Kang, Dowhan Jung, Kwanghyun Chung, Soonhoi Ha 78.
  108. -E-LSTM: Efficient Inference of Sparse LSTM on Embedded Heterogeneous System.....1051
  109. Runbin Shi, Junjie Liu, Shuo Wang, Yun Liang, Hayden So Design Automation Conference 2019 Table of Contents
  110. 3 -ReForm: Static and Dynamic Resource-aware DNN Reconfiguration Framework for Mobile Devices.....1057
  111. Zirui Xu, Fuxun Yu, Liang Zhao, Chenchen Liu, Xiang Chen 78.
  112. -XBioSiP: A Methodology for Approximate Bio-signal Processing at the Edge.....1063
  113. Bharath Srinivas Prabakaran, Semeen Rehman, Muhammad Shafique
  114. 1 -RevSCA: Using Reverse Engineering to Bring Light into Backward Rewriting for Big and Dirty Multipliers.....1069
  115. Alireza Mahzoon, Daniel Grosse, Rolf Drechsler 79.2 -Temporal Tracing of On-chip Signals Using Timeprints.....1075
  116. Rehab Massoud, Hoang M. Le, Peter Chini, Prakash Saivasan, Roland Meyer, Rolf Drechsler 79.3 -ACCESS: HW/SW Co-equivalence Checking for Firmware Optimization.....1081
  117. Michael Schwarz, Raphael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Dominik Stoffel, Wolfgang Kunz 79.4 -Early Concolic Testing of Embedded Binaries with Virtual Prototypes: A RISC-V Case Study.....1087
  118. Vladimir Herdt, Daniel Grosse, Hoang M Le, Rolf Drechsler 80.1 -Tetris: A Streaming Accelerator for Physics-limited 3D Plane-wave Ultrasound Imaging.....1093
  119. Brendan L West, Jian Zhou, Ronald G Dreslinski, J. Brian Fowlkes, Oliver Kripfgans, Chaitali Chakrabarti, Thomas F Wenisch 80.2 -ProbLP: A Framework for Low-precision Probabilistic Inference.....1099
  120. Nimish Shah, Laura I. Galindez Olascoaga, Wannes Meert, Marian Verhelst 80.3 -An Optimized Design Technique of Low-bit Neural Network Training for Personalization on IoT Devices.....1105
  121. Seungkyu Choi, Jaekang Shin, Yeongjae Choi, Lee-Sup Kim
  122. 4 -L-MPC: A LUT based Multi-level Prediction-correction Architecture for Accelerating Binary-weight Hourglass Network.....1111
  123. Hong Liu, Leibo Liu, Wenping Zhu, Qiang Li, Huiyu Mo, Shaojun Wei 81.1 -eSLAM: An Energy-efficient Accelerator for Real-time ORB-SLAM on FPGA Platform.....1117
  124. Runze Liu, Jianlei Yang, Yiran Chen, Weisheng Zhao 81.2 -ShuntFlow: An Efficient and Scalable Dataflow Accelerator Architecture for Streaming Applications.....1123
  125. Shijun Gong, Jiajun Li, Wenyan Lu, Guihai Yan, Xiaowei Li 81.3 -A General Pattern-based Dynamic Compilation Framework for Coarse-grained Reconfigurable Architectures.....1129
  126. Xingchen Man, Leibo Liu, Jianfeng Zhu, Shaojun Wei 81.4 -ReTagger: An Efficient Controller for DRAM Cache Architectures.....1135
  127. Mahdi Bojnordi, Farhan Nasrulla Design Automation Conference 2019 Table of Contents 83.1 -Software Approaches for In-time Resilience.....1141
  128. Aviral Shrivastava, Moslem Didehban 83.2 -Cross-Layer Resilience: Challenges, Insights, and the Road Ahead.....1145
  129. Eric Cheng, Daniel Mueller-Gritschneder, Jacob Abraham, Pradip Bose, Alper Buyuktosunoglu, Deming Chen, Hyungmin Cho, Yanjing Li, Uzair Sharif, Kevin Skadron, Mircea Stan, Ulf Schlichtmann, Subhasish Mitra 83.3 -Increasing Soft Error Resilience by Software Transformation.....1149
  130. Michael Werner, Moomen Chaari, Devarajegowda Keerthikumara, Wolfgang Ecker 84.1 -FLightNNs: Lightweight Quantized Deep Neural Networks for Fast and Accurate Inference.....1153
  131. Ruizhou Ding, Zeye Liu, Ting-Wu Chin, Diana Marculescu, Ronald Blanton 84.2 -BiScaled-DNN: Quantizing Long-tailed Data-structures with Two Scale Factors for Deep Neural Networks.....1159
  132. Shubham Jain, Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Kailash Gopalakrishnan, Leland Chang 84.3 -A None-Sparse Deep Learning Accelerator that Explores the Computation Redundancy in Neural Networks.....1165
  133. Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li 84.4 -On the Complexity Reduction of Dense Layers from O(N^2) to O(N logN) with Cyclic Sparsely Connected Layers.....1171
  134. Seyed-Morteza Hosseini, Mark Horton, Hirenkumar S Paneliya, Uttej Kallakuri, Tinoosh Mohsenin 84.5 -Sensitivity Based Error Resilient Techniques for Energy Efficient Deep Neural Network Accelerators.....1177
  135. Wonseok Choi, Dongyeob Shin, Jongsun Park, Swaroop Ghosh 84.6 -St-DRC: Stretchable DRAM Refresh Controller with No Parity-overhead Error Correction Scheme for Energy-efficient DNNs.....1183
  136. Duy-Thanh Nguyen, Nhut-Minh Ho, Ik-Joon Chang 85.1 -FPGA/DNN Co-design: An Efficient Design Methodology for IoT Intelligence on the Edge.....1189
  137. Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, KYLE J RUPNOW, Wen-mei Hwu, Deming Chen 85.2 -Scale-out Acceleration for 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA system.....1195
  138. Junzhong Shen, Deguang Wang, You Huang, mei wen, Chunyuan Zhang 85.3 -Dr. BFS: Data-centric Breadth-first Search on FPGAs.....1201
  139. Eric Finnerty, Zach Sherer, Yan Luo, Hang Liu 85.
  140. -Peregrine: A Flexible Hardware Accelerator for LSTM with Limited Synaptic Connection Patterns.....1207
  141. Jaeha Kung, Junki Park, Sehun Park, Jae-Joon Kim 85.5 -Systolic Cube: A Spatial 3D CNN Accelerator Architecture for Low Power Video Analysis.....1213
  142. Yongchen Wang, Ying Wang, Huawei Li, Shi Cong, Xiaowei Li Design Automation Conference 2019 Table of Contents 85.6 -Context-aware Convolutional Neural Network over Distributed System in Collaborative Computing.....1219
  143. Jinhang Choi, Zeinab Hakimi, Philip W Shin, Jack Sampson, Vijaykrishnan Narayanan 86.1 -The Best of Both Worlds: On Exploiting Bit-alterable NAND Flash for Lifetime and Read Performance Optimization.....1225
  144. Shuo-Han Chen, Ming-Chang Yang, Yuan-Hao Chang 86.2 -WAS: Wear Aware Superblock Management for Prolonging SSD Lifetime.....1231
  145. Shunzhuo Wang, Fei Wu, Chengmo Yang, Jiaona Zhou, Changsheng Xie, Jiguang Wan 86.3 -ASCache: An Approximate SSD Cache for Error-tolerant Applications.....1237
  146. Fei Li, Youyou Lu, Zhongjie Wu, Jiwu Shu 86.4 -Leveraging Approximate Data for Robust Flash Storage.....1243
  147. Qiao Li, Liang Shi, Jun Yang, Youtao Zhang, Chun Jason Xue 87.1 -MARCH: MAze Routing Under a Concurrent and Hierarchical Scheme for Buses.....1249
  148. Jingsong Chen, Jinwei Liu, Gengjie Chen, Dan Zheng, Evangeline F.Y. Young
  149. 2 -A DAG-based Algorithm for Obstacle-aware Topology-matching On-track Bus Routing.....1255
  150. Chen-Hao Hsu, Shao-Chun Hung, Hao Chen, FAN-KENG SUN, Yao-Wen Chang
  151. 3 -A Learning-based Recommender System for Autotuning Design Flows of Industrial High-performance Processors.....1261
  152. Jihye Kwon, Matthew M Ziegler, Luca P Carloni 87.4 -Painting on Placement: Forecasting Routing Congestion Using Conditional Generative Adversarial Nets.....1267
  153. Cunxi Yu, Zhiru Zhang
  154. 5 -Pin Accessibility Prediction and Optimization with Deep Learning-based Pin Pattern Recognition.....1273
  155. Tao-Chun Yu, Shao-Yun Fang, Hsien-Shih Chiu, Kai-Shun Hu, Philip Hui-Yuh Tai, Chin-Fang Cindy Shen, Henry Sheng 87.6 -FIT: Fill Insertion Considering Timing.....1279
  156. Bentian Jiang, Xiaopeng Zhang, Ran Chen, Gengjie Chen, Peishan Tu, Wei Li, Evangeline F.Y. Young, Bei Yu 88.1 -The Metric Matters: The Art of Measuring Trust in Electronics.....1285
  157. Prabhat Mishra, Jonathan Cruz, Swarup Bhunia 100.1 -Late Breaking Results: Authenticated Call Stack.....1289
  158. Hans Liljestrand, Thomas Nyman, Jan-Erik Ekberg, N Asokan 100.2 -Late Breaking Results:United We Stand: A Threshold Signature Scheme for Identifyingoutliers in PLCs.....1291
  159. Urbi Chatterjee, Pranesh Santikellur, Rajat Sadhukhan, Vidya Govindan, Debdeep Mukhopadhyay, Rajat S Chakraborty Design Automation Conference 2019 Table of Contents
  160. 3 -Late Breaking Results: Improving Static Power Efficiency via Placementof Network Demultiplexer over Control Plane of Router in Multi-NoCs.....1293
  161. Sonal Yadav, Vijay Laxmi, Manoj Singh Gaur, Hemangee K Kapoor 100.4 -Late Breaking Results: How Secure are Deep Learning Algorithms from Side-Channel based Reverse Engineering?.....1295
  162. Manaar Alam, Debdeep Mukhopadhyay 100.5 -Late Breaking Results: Predicting DRC Violations Using Ensemble Random Forest Algorithm.....1297
  163. Riadul Islam, Md Asif Shahjalal 100.6 -Late Breaking Results: Analog Circuit Generator based on Deep Neural Network enhanced Combinatorial Optimization.....1299
  164. Kourosh Hakhamaneshi, Kourosh Hakhamaneshi, Nick Werblun, Pieter Abbeel, Vladimir M Stojanovic 100.7 -Late Breaking Results: Distributed Timing Analysis at Scale.....1301
  165. Tsung-Wei Huang, Chun-Xun Lin, Martin D.F. Wong
  166. 8 -Late Breaking Results: Towards Practical Record and Replay for Mobile Applications.....1303
  167. Onur Sahin, Assel Aliyeva, Ayse K Coskun, Manuel Egele, Hariharan Mathavan 100.9 -Late Breaking Results: The Ping-Pong Tunable Delay Line In A Super-Resilient Delay-Locked Loop.....1305
  168. Zheng-Hong Zhang, Wei Chi, Shi-Yu Huang 100.10 -Late Breaking Results: An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis.....1307
  169. Po-Cheng Pan, Chien-Chia Huang, Hung-Ming Chen
  170. 11 -Late Breaking Results: LODESTAR: Creating Locally-Dense CNNs for Efficient Inference on Systolic Arrays.....1309
  171. Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili 100.12 -Late Breaking Results: Robustly Executing DNNs in IoT Systems Using Coded Distributed Computing.....1311
  172. Ramyad Hadidi, Jiashen Cao, Michael S Ryoo, Hyesoon Kim 100.13 -Late Breaking Results: Visual Cortex Inspired Pixel-Level Re-configurable Processors for Smart Image Sensors.....1313
  173. Pankaj Bhowmik, Md Jubaer Hossain H Pantho, Christophe Bobda 100.14 -Late Breaking Results: Efficient Circuits for Quantum Search over 2D Square Lattice Architecture.....1315
  174. Shaohan Hu, Dmitri Maslov, Marco Pistoia, Jay Gambetta 100.15 -Late Breaking Results: SEDA -Single Exact Dual Approximate Adders for Approximate Processor.....1317
  175. Chandan K Jha, Joycee Mekie Design Automation Conference 2019 Table of Contents 100.16 -Late Breaking Results: Merging Everything (ME): A Unified FPGA Architecture Based on Logic-in- Memory Techniques.....1319
  176. Xiaoming Chen, Longxiang Yin, Bosheng Liu, Yinhe Han 100.17 -Late Breaking Results: New Computational Results and Hardware Prototypes for Oscillator-based Ising Machines.....1321
  177. Tianshi Wang, Leon Wu, Jaijeet Roychowdhury 100.18 -Late Breaking Results: Internal Structure Aware RDF Data Management in SSDs.....1323
  178. Renhai Chen, Qiming Guan, Guohua Yan, Zhiyong Feng

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