Efficient coupled noise estimation for RLC on-chip interconnect
2012 IEEE Symposium on Humanities, Science and Engineering Research, 2012
Abstract This paper presents an accurate, fast and simple closed form solution to estimate crosst... more Abstract This paper presents an accurate, fast and simple closed form solution to estimate crosstalk noise between two adjacent wires in VLSI circuits, using RLC interconnect model. Noise analysis and avoidance techniques are critical steps in deep submicron VLSI technology. Currently noise analysis performed either through circuit or timing simulation. These techniques are still inefficient for analyzing massive amount of interconnect data found in present day integrated circuit. This paper presents an efficient technique for ...
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Papers by vimal yadav