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ORCIDIEEE Open Journal of Circuits and Systems, Volume 6
Volume 6, 2025
- Tobias Kaiser
, Esther Gottschalk, Kai Biethahn, Friedel Gerfers:
Pasithea-1: An Energy-Efficient Sequential Reconfigurable Array With CPU-Like Programmability. 1-13 - Kunal Yadav, Ping-Hsuan Hsieh, Anthony Chan Carusone:
Linearity Analysis of Source-Degenerated Differential Pairs for Wireline Applications. 26-37 - Bangda Yang, Trevor C. Caldwell, Anthony Chan Carusone:
An Energy-Efficient Pipeline-SAR ADC Using Linearized Dynamic Amplifiers and Input Buffer in 22nm FDSOI. 50-62 - Chung-Lun Tu, Chen-Yuan Tseng, Wei-Che Lee, Kang-Lun Chiu, Pei-Yun Tsai, Shyh-Jye Jou:
Synchronization and Channel Estimation Design for Multi-Stream MIMO System in Sub-Terahertz Channel Model. 14-25 - Andrew Maclellan, Louise H. Crockett, Robert W. Stewart:
RFSoC Modulation Classification With Streaming CNN: Data Set Generation & Quantized-Aware Training. 38-49 - Sayma Nowshin Chowdhury, Matthew Chen, Sahil Shah:
Analysis and Verilog-A Modeling of Floating-Gate Transistors. 63-73 - Yufei Xiao, Kai Cai, Xiaohu Ge, Yong Xiao:
Energy Consumption Modeling of 2-D and 3-D Decoder Circuits. 74-84 - Amirhossein Rostami, Seyed Mohammad Ali Zeinolabedin, Liyuan Guo, Florian Kelber, Heiner Bauer, Andreas Dixius, Stefan Scholze, Marc Berthel, Dennis Walter, Johannes Uhlig, Bernhard Vogginger, Christian Mayr:
NLU: An Adaptive, Small-Footprint, Low-Power Neural Learning Unit for Edge and IoT Applications. 85-99 - Konstantinos Metaxas, Vassilis Alimisis, Costas Oustoglou, Yannis Kominis, Paul P. Sotiriadis:
Nonlinear Analysis of Differential LC Oscillators and Injection Locked Frequency Dividers. 100-109 - Sung-June Byun, ByeongGi Jang, JongWan Jo, Dae-Young Choi, YoungGun Pu, Sang-Sun Yoo, Seok-Kee Kim, Yeon-Jae Jung, Kang-Yoon Lee:
Design of a High Efficiency Bi-Directional Four-Switch Buck-Boost Converter With HV Gate Driver for Multi-Cell Battery Power Bank Applications. 110-119 - Jiovana Sousa Gomes, Mateus Grellert, Fábio Luís Livi Ramos, Sergio Bampi:
End-to-End Neural Video Compression: A Review. 120-134 - Hanyoung Lee, Ardianto Satriawan, Hanho Lee:
Homomorphic Evaluation Cluster Architecture for Fully Homomorphic Encryption. 135-146 - Maximilian Scherzer, Mario Auer:
An Integrated Fully Differential Current Amplifier With Frequency Compensation for Inductive Sensor Excitation. 147-154 - Georgios G. Roumeliotis, Jan Desmet, Jos Knockaert:
Circuit Simulation of Any Time-Domain Source on Fractional-Order Impedances by Use of the Haar Wavelet Transform, Case Study of the Skin Effect. 155-168 - Yifei Zhu, Zhenxuan Luan, Dawei Feng, Weiwei Chen, Lei Ren, Zhangxi Tan:
Revolutionize 3D-Chip Design With Open3DFlow, an Open-Source AI-Enhanced Solution. 169-180 - Felicia Guo, Bob L. Zhou, Ayan Biswas, Paul Kwon, Zhaokai Liu, Ken Ho, Vladimir Stojanovic, Borivoje Nikolic:
BAG3++: An Extensible Generator Framework for Automated Layout-Aware AMS Design. 181-191 - Inès Winandy, Arnaud Dion, Florent Manni, Pierre-Loïc Garoche, Dorra Ben Khalifa, Matthieu Martel:
Automated Fixed-Point Precision Optimization for FPGA Synthesis. 192-204 - Yuntao Han, Yihan Pan, Xiongfei Jiang, Cristian Sestito, Shady Agwa, Themis Prodromakis, Shiwei Wang:
L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering. 205-216 - SeyedMohamadJavad Motaman, Sarah Safura Sharif, Yaser Michael Banad:
Biologically-Inspired, Ultra-Low Power, and High-Speed Integrate-and-Fire Neuron Circuit With Stochastic Behavior Using Nanoscale Side-Contacted Field Effect Diode Technology. 217-227 - Eric Christie, Jared Marchant, Shea Smith, Long Kong, Chia-Hung Chen, Shiuh-Hua Wood Chiang:
A Review on Sub-0.21-V Ultra-Low-Supply-Voltage Analog-to-Digital Converters. 228-240 - Fei Yuan:
A Comparative Study of Dynamic Comparators for Low-Power Successive Approximation ADC. 241-256 - Sonia Akter, Shelby Williams, Prosen Kirtonia, Magdy A. Bayoumi, Kasem Khalil:
A Lightweight Hybrid Random Number Generator With Dynamic Entropy Injection. 257-269 - Wenhao Wu, Fei Yuan, Yushi Zhou:
Sub-Threshold All-Digital DLL for Clock Generation of SAR ADC. 270-282 - Sai Sanjeet, Sanchari Das, Shiuh-Hua Wood Chiang, Masahiro Fujita, Bibhu Datta Datta:
Systematic Design of Ring VCO-Based SNN - Translating Training Parameters to Circuits. 283-294 - Masoud Askariraad, Stefano Gregori:
Comparison and Design of Linear and Exponential Integrated Charge Pumps. 295-312 - Konstantinos Metaxas, Paul P. Sotiriadis, Yannis Kominis:
Complex Synchronization Dynamics of Electronic Oscillators-Part I: A Time-Domain Approach via Phase-Amplitude Reduced Models. 329-342 - Konstantinos Metaxas, Nikolaos P. Eleftheriou, Yannis Kominis, Paul P. Sotiriadis:
Complex Synchronization Dynamics of Electronic Oscillators-Part II: Simulations and Validation of Phase-Amplitude Reduced Models. 343-355 - Andres Rojas, Gawen Follet, Gordana Jovanovic-Dolecek, José M. de la Rosa, Gustavo Liñán Cembrano:
Prediction-Based Spectrum Sensing Framework for Cognitive Radio. 313-328 - Haesung Jung, Quang Dang Truong, Hanho Lee:
Highly-Efficient Hardware Architecture for ML-KEM PQC Standard. 356-369 - Katsutoshi Ito, Yusaku Shiotsu, Satoshi Sugahara:
A New Ultralow-Voltage Retention SRAM Cell Enhancing Noise Immunity. 370-382 - Chia Jen Cheng, Ethan Chen, Vanessa Chen:
Improving Neural Network Fault Tolerance Against Weight Attack. 383-392 - Syed Adil Ali Shah, YoungGun Pu, Young-Joon Kim, Kang-Yoon Lee:
A High Efficient Cross-Coupled Active Rectifier by Using High Speed Switching Comparators for Wireless Power Receiver. 393-400 - Andrew Ash, John Hu:
A Proxy ADC Framework for Side-Channel Secure ADC Analysis. 401-413 - Uday Maurya, Mahima Arrawatia, Nagarjuna Nallam:
A Low-Loss T/R Module With Balanced Power Amplifier for High Antenna Impedance Tolerance. 414-423 - Paul Kaesser, Maurits Ortmanns:
Performance Prediction of Incremental ΔΣ ADCs. 424-431
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last updated on 2025-10-08 22:28 CEST by the dblp team
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